Specifications

Cinterion
®
EXS82-W Hardware Interface Overview
2.1 Application Interface
25
 EXS82-W_HIO_v00.038 2019-12-27
Public / Preliminary
Page 13 of 44
2.1.3 Serial Interface ASC1
EXS82-W provides a 4-wire unbalanced, asynchronous modem interface ASC1 conforming to
ITU-T V.24 protocol DCE signaling. The electrical characteristics do not comply with ITU-T
V.28. The significant levels are 0V (for low data bit or active state) and 1.8V (for high data bit
or inactive state).
EXS82-W is designed for use as a DCE. Based on the conventions for DCE-DTE connections
it communicates with the customer application (DTE) using the following signals:
• Port TXD @ application sends data to module’s TXD1 signal line
• Port RXD @ application receives data from the module’s RXD1 signal line
Figure 4: Serial interface ASC1
Features
• Includes only the data lines TXD1 and RXD1 plus RTS1 and CTS1 for hardware hand-
shake.
• Configured for 8 data bits, no parity and 1 or 2 stop bits.
• ASC1 can be operated at fixed bit rates from 300bps to 921,600bps.
• Supports RTS1/CTS1 hardware flow as a configuration option (see [1]). The hardware hand
shake line RTS0 has an internal pull down resistor causing a low level signal, if the line is
not used and open. Although hardware flow control is recommended, this allows communi-
cation by using only RXD and TXD lines.