Specifications

Cinterion
®
PLS62-W Hardware Interface Overview
2.3 Sample Application
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2.3 Sample Application
Figure 15 shows a typical example of how to integrate a PLS62-W module with an application.
Usage of the various host interfaces depends on the desired features of the application.
Because of the very low power consumption design, current flowing from any other source into
the module circuit must be avoided, for example reverse current from high state external control
lines. Therefore, the controlling application must be designed to prevent reverse current flow.
Otherwise there is the risk of undefined states of the module during startup and shutdown or
even of damaging the module.
Because of the high RF field density inside the module, it cannot be guaranteed that no self
interference might occur, depending on frequency and the applications grounding concept. The
potential interferers may be minimized by placing small capacitors (47pF) at suspected lines
(e.g. RXD0, VDDLP, and ON).
While developing SMT applications it is strongly recommended to provide test points
for certain signals, i.e., lines to and from the module - for debug and/or test purposes.
The SMT application should allow for an easy access to these signals. For details on
how to implement test points see [4].
The EMC measures are best practice recommendations. In fact, an adequate EMC strategy for
an individual application is very much determined by the overall layout and, especially, the po-
sition of components.
Note: PLS62-W is not intended for use with cables longer than 3m.
Disclaimer
No warranty, either stated or implied, is provided on the sample schematic diagram shown in
Figure 15 and the information detailed in this section. As functionality and compliance with na-
tional regulations depend to a great amount on the used electronic components and the indi-
vidual application layout manufacturers are required to ensure adequate design and operating
safeguards for their products using PLS62-W modules.