Specifications

Table Of Contents
Cinterion
®
PLSx3 Hardware Interface Description
2.4 Sample Application
66
t PLSx3_HID_v01.002d 2021-08-24
Public / Released
Page 66 of 129
Figure 26: Schematic diagram of PLSx3 sample application
PWR_IND
V180
GND
GND
GND
ANT_MAIN
BATT+
RF
Main antenna
PLSx3
Power Indicator
BATT+
BB
USB interface*
3
USB
GND
GND
ANT_DRX
Diversity antenna
V180
E.g., 100k
E.g., VBATT
GND
GND
ANT_GNSS
GNSS antenna
2
2
IGT
EMERG_RST
ANT_GNSS_DCANT_GNSS_DC
*For more details see
Section 5.2 GNSS Antenna Interface
*For more details
see
Section 2.1.3
USB Interface
Serial Interface
8
ACS0
Serial Interface
4
ACS1
PCM(I2S) Interface&MCLK
Digital Audio
3
ADC
ADC input interface
Status
LED
Status
FST_SHDN
Fast shutdown
CCVCC1
CCIO1
CCCLK1
CCRST1
CCIN1
SIM1
GND
10 pF
GND
10 pF
GND
220 nF
GND
1 nF
GND
SIM2
GND
10 pF
GND
10 pF
GND
220 nF
GND
1 nF
GND
10k
CCVCC1
CCVCC2
CCIO2
CCCLK2
CCRST2
CCIN2
10k
CCVCC2
SIM_SWITCH
SIM Switch
V180
2.2k
2.2k
I2CCLK
I2CDAT
GND
GPIO
GPIO*
*When has the
functionof GPIO
multiplexing PADs,
used as GPIOfunction,
need through the SW
switchcommand.
BATT+_DSB
0R
'HFRXSOLQJ
FDSDFLWRUV
HJȝ)0/&&
;5
100nF
33pF
GND
47k
%&
GND
47k
%&
5
'HFRXSOLQJ
FDSDFLWRUV
HJȝ)0/&&
;5