Specifications

Cinterion
®
PLSx3 Hardware Interface Description
3.2 Power Up/Power Down Scenarios
89
t PLSx3_HID_v01.002d 2021-08-24
Public / Released
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3.2.3 Signal States after Startup
Table 16 lists the states each interface signal passes through during reset phase and the first
firmware initialization. For further firmware startup initializations the values may differ because
of different GPIO line configurations.
After the reset state has been reached the firmware initialization state begins. The firmware ini-
tialization is completed as soon as the ASC0 interface lines CTS0, DSR0 and RING0 have
turned low (see Section 2.1.4 and Section 2.1.5). Now, the module is ready to receive and
transmit data.
Note: the values above are stored as non- volatile, any changes of the value will take effect
after next power-cycle and remain effective before any change happens again.
Abbreviations used in above Table 16:
Table 16: Pull-up and Pull-down Values
Signal name Reset state First start up configuration
RXD0 PD O/H
TXD0 PD PD
RTS0
CTS0 PD O/L
STATUS/GPIO5 PD PD
DSR0/GPIO3 PD O/L
DCD0/GPIO2 PD O/H
RING0/GPIO24 PD O/H
RXD1/GPIO16 PD O/H
TXD1/GPIO17 PD PD
RTS1/GPIO18 PD PD
CTS1/GPIO19 O/H O/H
GPIO6-8 PD PD
GPIO11-13 PD PD
GPIO14-15
GPIO25 I I
DOUT/GPIO20 PD PD
DIN/GPIO21 PD O/H
SIM_SWITCH/GPIO26 PD PD
FAST_SHDN/GPIO4 PD PD
L = Low level
H = High level
T = Tristate
I = Input
O = Output
OD = Open Drain
PD = Pull down, 200µA at 1.9V
PU = Pull up, -240µA at 0V