Specifications
Table Of Contents
- Contents
- Tables
- Figures
- 1 Introduction
- 2 Interface Characteristics
- 2.1 Application Interface
- 2.2 RF Antenna Interface
- 2.3 GNSS Antenna Interface
- 2.4 Sample Application
- 3 Operating Characteristics
- 4 Mechanical Dimensions, Mounting and Packaging
- 5 Regulatory and Type Approval Information
- 6 Document Information
- 7 Appendix
Cinterion
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PLSx3 Hardware Interface Description
2.1 Application Interface
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t PLSx3_HID_v01.003 2021-03-12
Public / Released
Page 37 of 121
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2.1.9 Analog-to-Digital Converter (ADC)
PLSx3 provides three unbalanced ADC input line: ADC[1...3]_IN. They can be used to mea-
sure three independent, externally connected DC voltages in the range of 0.1V to 1.7V. They
can be used especially for antenna diagnosing.
The AT^SRADC command can be employed to select the ADC line, set the measurement
mode and read out the measurement results.
2.1.10 Control Signals
2.1.10.1 Status LED
The GPIO5 interface line can be configured to drive a status LED that indicates different oper-
ating mode (for GPIOs see 2.1.7). GPIO and LED functionality are mutually exclusive.
To take advantage of this function connect an LED to the GPIO5/STATUS line as shown in
Figure 12
Figure 12: Status signaling with LED driver
Table 8: Overview of I
2
S pin functions
Signal name on
SMT application
interface
Signal configura-
tion inactive
Signal direction
Master
Description
DOUT PD O I
2
S data from PLSx3 to external
codec
DIN PD I I
2
S data from external codec to
PLSx3
FSC PD O Frame synchronization signal to
external codec Word alignment
(WS)
BCLK PD O Bit clock to external codec.
BCLK signal low/high time varies
between 45% and 55% of its clock
period.
VCC
STATUS
LED
GNDGND
R1
R2
R3