Specifications

Table Of Contents
Cinterion
®
PLSx3 Hardware Interface Description
1.4 Circuit Concept
16
t PLSx3_HID_v01.003 2021-03-12
Public / Released
Page 16 of 122
1.4 Circuit Concept
Figure 2 shows block diagrams of the PLSx3 module and illustrate the major functional com-
ponents:
Figure 2: PLSx3 block diagram
SOC
PMU
BATT+BB
XTAL
MCLK
USB
ASC0
ASC1
GPIO
PWR_IND
I2C
I2S/PCM
UIM1
UIM2
STATUS
RF
FAST_SHDN
SIM_SWITCH
Memory
BUS
Control
P
o
w
e
r
Power
ANT
C
o
n
t
r
o
l
EMERG_RST
IGT
ADC_IN
VGNSS
V180