Specifications

Cinterion
®
PLSx3 Hardware Interface Description
2.4 Sample Application
60
t PLSx3_HID_v01.003 2021-03-12
Public / Released
Page 60 of 121
Figure 22: Schematic diagram of PLSx3 sample application
PWR_IND
V180
GND
GND
GND
ANT_MAIN
BATT+
RF
Main antenna
PLSx3
Power Indicator
BATT+
BB
USB interface*
3
USB
GND
GND
ANT_DRX
Diversity antenna
V180
E.g., 100k
E.g., VBATT
GND
GND
ANT_GNSS
GNSS antenna
2
2
IGT
EMERG_RST
ANT_GNSS_DC
ANT_GNSS_DC
*For more details see
Section 5.2 GNSS Antenna Interface
*For more details see
Section 2.1.3 USB Interface
Ser ial In te rfa ce
8
ACS0
Ser ial In te rfa ce
4
ACS1
PCM(I2S) Interface&MCLK
Digital Audio
3
ADC
ADC input interface
Status
LE D
Status
FST_SHDN
Fast shutdown
CCVCC1
CCIO1
CCCLK1
CCRST1
CCIN1
SIM1
GND
10 pF
GND
10 pF
GND
220 nF
GND
1 nF
GND
SIM2
GND
10 pF
GND
10 pF
GND
220 nF
GND
1 nF
GND
10k
CCVCC1
CCVCC1
CCIO1
CCCLK1
CCRST1
CCIN1
10k
CCVCC2
SIM_SWITCH
SIM Switch
V180
2.2k
2.2k
I2CCL K
I2CDA T
GND
GPIO
GPIO*
*When has the function of GPIO
multiplexing PADs, used as GPIO
function, need through the SW switch
command.
BATT+_DSB
0R
100μF,
Low ESR!
+
220nF
22pF
GND
47k
%&
GND
47k
%&
5
4.7μF10μF47μF
100μF,
Low ESR!
100μF,
Low ESR!
+
+
+
0R
0R