Product Info
Table Of Contents
- Contents
- Tables
- Figures
- 1 Introduction
- 2 Interface Characteristics
- 2.1 Application Interface
- 2.2 RF Antenna Interface
- 2.3 GNSS Interface
- 2.4 Sample Application
- 3 Operating Characteristics
- 3.1 Operating Modes
- 3.2 Power Up/Power Down Scenarios
- 3.3 Power Saving
- 3.4 Power Supply
- 3.5 Operating Temperatures
- 3.6 Electrostatic Discharge
- 3.7 Blocking against RF on Interface Lines
- 3.8 Reliability Characteristics
- 4 Mechanical Dimensions, Mounting and Packaging
- 5 Regulatory and Type Approval Information
- 6 Document Information
- 7 Appendix
Cinterion
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TX62-W(-B/-C)/TX82-W Hardware Interface Description
2.1 Application Interface
69
t TX62-W_TX62-W-x_TX82-W_HID_v01.000 2021-05-19
Confidential / Preliminary
Page 44 of 154
2.1.10 SPI Interface
The embedded processing option of TX62/TX82 provides an SPI interface where four GPIO
interface lines can be configured as Serial Peripheral Interface (SPI). The SPI is a synchronous
serial interface allowing the module to control external sensors or components. The SPI inter-
face supports only master mode. The transmission rates are up to 6.5Mbit/s. The SPI interface
comprises the two data lines MOSI and MISO, the clock line SPI_CLK a well as the chip select
line SPI_CS.
The GPIO lines are also shared with the ASC1 signal lines as shown in Section 2.1.8.1.
The SPI interface can be configured and activated via embedded application. For more infor-
mation see [7].
In general, SPI supports four operation modes. The modes are different in clock phase and
clock polarity. The module’s SPI mode can be configured via embedded processing option.
Make sure the module and the connected slave device works with the same SPI mode.
Figure 19 shows the characteristics of the four SPI modes. The SPI modes 0 and 3 are the most
common used modes. For electrical characteristics please refer to Table 3.
Figure 19: Characteristics of SPI modes
SPI MODE 0 SPI MODE 1
SPI MODE 2 SPI MODE 3
Clock phase
Clock polarity
SPI_CS
MOSI
SPI_CLK
MISO
SPI_CS
MOSI
SPI_CLK
MISO
SPI_CS
MOSI
SPI_CLK
MISO
SPI_CS
MOSI
SPI_CLK
MISO
Sample Sample
Sample Sample