Specifications

Cinterion
®
TX62-W/TX82-W Hardware Interface Description
Figures
170
t TX62-W_TX62-W-x_TX82-W-x_HID_v01.200d 2022-09-08
Public / Preliminary
Page 8 of 170
Figures
Figure 1: TX62/TX82 system overview ......................................................................... 16
Figure 2: TX82-W block diagram................................................................................... 17
Figure 3: TX82-W-B block diagram............................................................................... 18
Figure 4: TX62-W block diagram................................................................................... 19
Figure 5: TX62-W-B block diagram............................................................................... 20
Figure 6: TX62-W-C block diagram............................................................................... 21
Figure 7: TX62/TX82 top view: Pad assignments ......................................................... 24
Figure 8: TX62/TX82 bottom view: Pad assignments ................................................... 25
Figure 9: USB circuit ..................................................................................................... 33
Figure 10: Serial interface ASC0..................................................................................... 34
Figure 11: ASC0 startup behavior................................................................................... 35
Figure 12: Serial interface ASC1..................................................................................... 36
Figure 13: ASC1 startup behavior................................................................................... 37
Figure 14: External UICC/SIM/USIM card holder circuit ................................................. 39
Figure 15: SIM interface - enhanced ESD protection...................................................... 40
Figure 16: eUICC interface with switch for external SIM................................................. 41
Figure 17: eUICC interface without SIM switch............................................................... 42
Figure 18: Interface bridging ........................................................................................... 43
Figure 19: GPIO start up behavior .................................................................................. 44
Figure 20: I
2
C interface connected to V180 .................................................................... 46
Figure 21: Characteristics of SPI modes......................................................................... 47
Figure 22: Status signaling with LED driver .................................................................... 48
Figure 23: Power indication circuit .................................................................................. 49
Figure 24: Fast shutdown timing ..................................................................................... 50
Figure 25: SIM switch circuit ........................................................................................... 52
Figure 26: Antenna pads (top view) ................................................................................ 62
Figure 27: Embedded Stripline with 65µm prepreg (1080) and 710µm core .................. 63
Figure 28: Micro-Stripline on 1.0mm Standard FR4 2-layer PCB - example 1................ 64
Figure 29: Micro-Stripline on 1.0mm Standard FR4 2-layer PCB - example 2................ 65
Figure 30: Micro-Stripline on 1.5mm Standard FR4 2-layer PCB - example 1................ 66
Figure 31: Micro-Stripline on 1.5mm Standard FR4 2-layer PCB - example 2................ 67
Figure 32: Routing to application‘s RF connector - top view........................................... 68
Figure 33: Sample supply voltage circuit for active GNSS antenna................................ 69
Figure 34: Schematic diagram of TX62/TX82 sample application .................................. 72
Figure 35: Sample level conversion circuit...................................................................... 73
Figure 36: Sample ON circuit .......................................................................................... 75
Figure 37: ON startup behavior....................................................................................... 76
Figure 38: Automatic switch ON circuit sample............................................................... 78
Figure 39: Emergency restart behavior........................................................................... 79
Figure 40: Switch off behavior......................................................................................... 82
Figure 41: Low power modes with state transitions ........................................................ 90
Figure 42: Wake-up via RTS0......................................................................................... 91
Figure 43: Handshake for entering the module’s SUSPEND mode................................ 92
Figure 44: Handshake for module wake up via ON signal .............................................. 93
Figure 45: Handshake for module wake up after eDRX/PSM timer expiry ..................... 93
Figure 46: DRX based paging and power saving (SLEEP) in GSM networks ................ 94
Figure 47: DRX based paging and power saving (SLEEP) in LTE Cat M1 and Cat NB1/2
networks 95
Figure 48: eDRX based paging and power saving in LTE Cat M1 and Cat NB1/2 networks
96