Specifications

Cinterion
®
TX62-W/TX82-W Hardware Interface Description
6.1 Revision History
164
t
TX62-W_TX62-W-x_TX82-W-x_HID_v01.200d 2022-09-08
Public / Preliminary
Page 158 of 170
Preceding document: “Cinterion
®
TXx2-W Hardware Interface Description" v00.002
New document: "Cinterion
®
TXx2-W Hardware Interface Description" v00.016
Preceding document: “Cinterion
®
TXx2-W Hardware Interface Description" v00.200a
New document: "Cinterion
®
TXx2-W Hardware Interface Description" v00.002
4.3.1.1 Revised stencil shown in Figure 64.
7.1 Updated ordering information.
Chapter What is new
Throughout
document
Added product TX82-W and TX62-W-B
1.2 Added GPIO to Key Feature at a Glance
2.1.1 Added Table 2 for Pad Assignment of additional Pads of TX82-W
2.1.1 Revised Pad Assignment regarding GPIO in Table 2, Table 3, Figure 7 and Figure 8
2.1.2 Revised Signal Properties regarding GPIO in Table 4
2.1.8 Added new chapter for GPIO
2.4 Revised Sample Application regarding GPIO and USB in Figure 34
3.2.3 Revised Table 18 regarding GPIO, corrected some signal states
3.7 Revised Table 31 regarding GPIO, removed USB signals
6.1 Revised changes for document version 00.002
Chapter What is new
Throughout
document
Removed product TX82-W, thus the document version number restarted to 00.002
1.2, 2.1.2,
3.4.1
Changed minimum BATT+
BB
from 2.5V to 2.55V in Table 4 and Table 23
1.2, 4.1 Changed hight of the module in Feature at a Glance and in Figure 54 and Figure 55
2.1.2 Revised ON signal description in Table 4
2.1.6 Added in Figure 14 hint where to place the capacitors
2.1.6.1 Added hint where to place the capacitors
2.1.7 Revised Figure 16 added reference to chapter 2.1.6.1
2.2.1 Updated Table 11
2.2.3 Revised Figure 28, Figure 29, Figure 30, Figure 31 and Figure 32 according to the foot-
print of TX62-W
3.4.3 Revised chapter and Figure 51 regarding GND reference point
3.7 Added placement of capacitors in Table 31 for SIM interface signals
4.1 Revised Figure 56