Specifications

Cinterion
®
TX62-W/TX82-W Hardware Interface Description
3.2 Power Up/Power Down Scenarios
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Public / Preliminary
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It is strongly recommended to control this EMERG_RST line with an open collector transistor
or an open drain field-effect transistor.
Caution: Use the EMERG_RST line only when, due to serious problems, the software is not
responding for more than 5 seconds. Pulling the EMERG_RST line causes the loss of all infor-
mation stored in the volatile memory. Therefore, this procedure is intended only for use in case
of emergency, e.g. if TX62/TX82 does not respond, if reset or shutdown via AT command fails.
Table 17: EMERG_RST restart timing values
Timing Description Typical value Unit
TX62-W
T0 - T1 EMERG_RST - V180 763.42 ms
T1 - T2 V180 – V180 (low) 1.05
T2 - T3 V180 (low) – VCORE 3.96
TX62-W-B
T0 - T1 EMERG_RST - V180 771.22 ms
T1 - T2 V180 – V180 (low) 0.94
T2 - T3 V180 (low) – VCORE 4.09
TX62-W-C
T0 - T1 EMERG_RST - V180 767.14 ms
T1 - T2 V180 – V180 (low) 0.62
T2 - T3 V180 (low) – VCORE 2.55
TX82-W
T0 - T1 EMERG_RST - V180 763.42 ms
T1 - T2 V180 – V180 (low) 1.05
T2 - T3 V180 (low) – VCORE 3.96
TX82-W-B
T0 - T1 EMERG_RST - V180 TBD. ms
T1 - T2 V180 – V180 (low) TBD.
T2 - T3 V180 (low) – VCORE TBD.