Owner manual

Copyright 2001 Cirrus Logic (All Rights Reserved) Jun ’01
AN199Rev1
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AN199
Application Note
DAI Interface for Playing MP3 Music
Introduction
The Maverick family of ARM7 core processors was designed to meet the needs of the "MP3" market to facilitate the
design of a cost-effective digital audio decoder. MP3 is the general name used for this market, which does include
other compressions schemes such as WMA, AAC, and ADPCM.
The Cirrus Logic 7209/12/73XX series microprocessors were all designed to support this market. Each one is
unique, but all possess the necessary hardware to effectively support an "MP3" solution. Each can be used in a
design to play a range of encoded music all based on different compression formats and sample rates.
This note will serve as a guide to initializing the Maverick processor to begin decoding music. Software
decompression is beyond of the scope of the note since it involves a discussion of the compression schemes of the
above mentioned formats.
Due to the changes in the DAI interface, a new hardware configuration is required to insure that the external
CODECs receive the appropriate signals. This is discussed in the hardware interface section.
General Discussion
The DAI (Digital Audio Interface) is the buffering and synchronization mechanism for sending decoded digital
music frames to the external CODEC(s) to be converted into audio. The DAI provides three synchronization clocks
that sync the data, frame by frame, for the external CODEC. The DAI FIFO buffer is eight samples deep and is
always filled with the decoded music frames.
The DAI FIFO controls the branch to the interrupt handler (FIQ). The FIFO can be configured a number of ways,
but based on the state of the FIFO, the FIQ will be triggered at which time the information will be transferred to or
from the FIFO. The information is either played or recorded.
The rule-of-thumb used in our reference player code is an interrupt rate that is ¼ of the sample rate. For a 44.1 kHz
file, the FIQ will be hit at an approximate rate of 11kHz. This is accomplished by configuring the DAI FIQ to assert
whenever the DAI FIFO is half-empty or contains only four frames.
To accomplish this, the DAI machine will need to be initialized properly and the FIQ Handler will need to process
the buffered data correctly. The following discussion will insure the interrupt rate and integrity of the information
passed to and from the DAI.