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CS5333 to CS5343/4 Transition

1. INTRODUCTION

The CS5333 and CS5343/4 are complete stereo analog-to-digital converters for digital audio systems. These con-

verters perform sampling, analog-to-digital conversion and anti-alias filtering, generating 24-bit values for both left

and right channels. These small, low-power converters are ideal for systems requiring wide dynamic range and low

noise such as set-top boxes, A/V receivers, DVD-karaoke players, DVD recorders, and automotive applications.

The CS5333 is no longer recommended for new designs, and the CS5343/4 is the suggested replacement.

This application note identifies the implementation differences between these two devices, including:

• Key specifications

• Pinout differences

• Startup mode selections

• System clocking

• Input filter topology

• Reference voltage

The CS5333 and CS5343/4 datasheets contain detailed information regarding device specifications, performance

and ordering information. Please reference the CS5333 and CS5343/4 datasheets while reading this document.

2. KEY SPECIFICATIONS

Table 1 shows a comparison of the key specifications of these two device families, and Table 2 shows the pin com-

parison between the CS5333 and the CS5343/4. Although these two devices are not pin compatible, they are very

similar in terms of overall functionality and feature set.

Parameter CS5333 CS5343/4 Units

Conversion 24 24 Bits

Dynamic Range (A-Weighted) 98 98 dB

THD+N -88 -90 dB

Analog Core Power Supply (VA) +1.8 to +3.3 +3.3 to 5 V

Digital Core Power Supply (VD) Powered from VA Powered from VA V

Digital Interface Power Supply (VL) +1.8 to +3.3 Powered from VA V

Typical Power ConsumptionAll supplies = +3.3 V 36 50 mW

Maximum Sample Rate 100 108 kHz

Package 16-pin TSSOP 10-pin TSSOP

Table 1. Comparison of Key Specifications

AN285

SEPTEMBER '05

AN285REV1

Summary of content (9 pages)

PAGE 1
AN285 CS5333 to CS5343/4 Transition 1. INTRODUCTION The CS5333 and CS5343/4 are complete stereo analog-to-digital converters for digital audio systems. These converters perform sampling, analog-to-digital conversion and anti-alias filtering, generating 24-bit values for both left and right channels. These small, low-power converters are ideal for systems requiring wide dynamic range and low noise such as set-top boxes, A/V receivers, DVD-karaoke players, DVD recorders, and automotive applications.
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AN285 CS5333 CS5343/4 Description Pin Number Pin Name Pin Number Pin Name 1 VL - - 2 MCLK 4 MCLK Master Clock 3 SCLK 2 SCLK Serial Clock 4 SDATA 1 SDOUT Serial Data 5 VA 10 VA 6 GND 9 GND Ground Reference 7 LRCK 3 LRCK Left/Right Clock 8 DIV - - Speed Mode Select/MCLK Divider 9 DIF - - Digital Interface Format Test Pin Logic Power Power 10 TST - - 11 FILT+ 5 FILT+ 12 REF_GND - - 13 AINR 8 AINR Right Channel Analog Input 14 AINL 6 AINL
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AN285 3. TYPICAL CONNECTION DIAGRAMS Figures 1 and 2 are the typical connection diagrams for the CS5333 and the CS5343/4 respectively. These diagrams demonstrate optimal power arrangements and the options available with pull-up or pull-down resistors on various I/O pins for each device. 1.8 to 3.3 V Supply + 1.0 µF 0.1 µF 5 VA FILT+ 11 1.0 µF + 1.8 to 3.3 V Supply 1 150 Ω 0.1 µF 0.47 µ F ** 150 Ω REF_GND 12 VL + 1.0 µF 13 + 1.0 µF VQ 15 AINL 0.01 µF * 0.
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AN285 + 1 µF 3.3 V to 5 V 0.1 µF VA FILT+ + 1µF 0.1 µF GND + 1µF VA or GND 0.1 µ F 1 VQ 10k Ω Audio Data Processor SDOUT CS5343/4 A/D Converter VA . 2 10kΩ SCLK Analog Input Circuitry AINL Figure 4 AINR 10k Ω 2 LRCK Timing Logic and Clock MCLK 1. 2. Pull-up to VA for Master Mode Pull-down to GND for Slave Mode Optional pull-up resistor for configuring clocks in Master Mode as described in Sections 5.2 and 6.2 Figure 2. CS5343/4 Typical Connection Diagram 4. POWER 4.
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AN285 5. MODE SELECTIONS: MASTER/SLAVE & SPEED MODES 5.1 5.1.1 CS5333 Mode Selections Master/Slave Mode Selection The CS5333 operates in either Master Mode or Slave Mode depending on the pull-up or pull-down resistor on the SDATA pin. A 47 kΩ pull-up resistor between SDATA and VL selects Master Mode while a 47 kΩ resistor between SDATA and GND will select Slave Mode. 5.1.2 Speed Mode Selection The CS5333 features a DIV pin which allows the user to configure speed in Master Mode.
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AN285 6. SYSTEM CLOCKING 6.1 CS5333 Clock Options The CS5333 supports an MCLK/LRCK ratio of 256x, 384x, 512x, and 768x in Base-Rate Mode, and 128x, 192x, 256x, and 384x in High-Rate Mode. However, in Master Mode, MCLK/LRCK ratios of 384x, 768x, and 192x are not accessible. Table 3 shows the available MCLK/LRCK ratios in each mode of operation for the CS5333. Furthermore, the CS5333 supports sample rates from 2 to 50 kHz in Base-Rate Mode and 50 to 100 kHz in High-Rate Mode.
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AN285 7. INPUT FILTER TOPOLOGY 7.1 CS5333 Input Filter Figure 3 shows the recommended input circuit for the CS5333. The CS5333 contains an internal continuous-time buffer. The external circuit provides filtering of high-frequency noise via the single-pole RC filter. The CS5333 will self-bias the input to the reference voltage (half of VA). If the incoming signal is not DC biased to within 5% of this value, then the series DC-blocking capacitor is necessary. 150 Ω CS5333 0.47µF AIN 0.01µF C0G Figure 3.
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AN285 7.2.2 CS5343/4 Full-Scale Voltage The CS5333 full-scale input voltage is 0.78xVA Vpp whereas the CS5343/4 full-scale input voltage is 0.56xVA Vpp, a difference of nearly 3 dB. This means that without attenuation, a full-scale signal to the CS5333 will over-range the CS5343/4. In migrating from the CS5333 to the CS5343/4, the input signal should either be reduced by 3 dB at the source or resistor values should be chosen such that the CS5343/4 input network provides 3 dB of attenuation.
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AN285 10.CONCLUSION With special attention to power arrangements, mode and clocking configurations, analog input circuitry, and reference voltage filtering, the transition from CS5333 to CS5343/4 should be simple and seamless. Furthermore, the CS5343/4 can improve system design by offering superior performance to the CS5333 while significantly reducing board space. 11.REVISION HISTORY Release Date A1 September 2005 Changes Initial Advance Release.