Instruction Manual

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Fractional-N Frequency Synthesizer

Features

 Delta-Sigma Fractional-N Frequency Synthesis

– Generates a Low Jitter 6 - 75 MHz Clock

Relative to 8 - 75 MHz Reference Clock

 Highly Accurate PLL Multiplication Factor

– Maximum Error Less Than 1 PPM

 One-Time Programmability

– Configurable Hardware Control Pins

– Configurable Auxiliary Output

 Flexible Sourcing of Reference Clock

– External Oscillator or Clock Source

– Supports Inexpensive Local Crystal

 Minimal Board Space Required

– No External Analog Loop-filter

Components

General Description

The CS2200-OTP is an extremely versatile system

clocking device that utilizes a programmable phase lock

loop. The CS2200-OTP is based on an analog PLL ar-

chitecture comprised of a Delta-Sigma Fractional-N

Frequency Synthesizer. This architecture allows for fre-

quency synthesis and clock generation from a stable

reference clock. The CS2200-OTP has many configura-

tion options which are set once prior to runtime. At

runtime there are three hardware configuration pins

available for mode and feature selection.

The CS2200-OTP is available in a 10-pin MSOP pack-

age in Commercial (-10°C to +70°C) and Automotive

(-40°C to +85°C) grades. Customer development kits

are also available for custom device prototyping, small

production programming, and device evaluation.

Please see “Ordering Information” on page 23 for com-

plete details.

Auxiliary

Output

6 to 75 MHz

PLL Output

3.3 V

8 MHz to 75 MHz

Low-Jitter Timing

Reference

Output to Input

Clock Ratio

Timing Reference

PLL Output

PLL Lock Indicator

Fractional-N

Divider

Voltage Controlled

Oscillator

Internal

Loop Filter

Phase

Comparator

Delta-Sigma

Modulator

Hardware Configuration

Hardware Control

MAY '10

DS842F2

CS2200-OTP

Summary of content (24 pages)

PAGE 1
CS2200-OTP Fractional-N Frequency Synthesizer Features General Description  Delta-Sigma Fractional-N Frequency Synthesis – Generates a Low Jitter 6 - 75 MHz Clock Relative to 8 - 75 MHz Reference Clock  Highly Accurate PLL Multiplication Factor – Maximum Error Less Than 1 PPM  One-Time Programmability – Configurable Hardware Control Pins – Configurable Auxiliary Output  Flexible Sourcing of Reference Clock – External Oscillator or Clock Source – Supports Inexpensive Local Crystal  Min
PAGE 2
CS2200-OTP TABLE OF CONTENTS 1. PIN DESCRIPTION ................................................................................................................................. 4 2. TYPICAL CONNECTION DIAGRAM ..................................................................................................... 5 3. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 6 RECOMMENDED OPERATING CONDITIONS ......................................
PAGE 3
CS2200-OTP Figure 2. Delta-Sigma Fractional-N Frequency Synthesizer ....................................................................... 8 Figure 3. Internal Timing Reference Clock Divider ..................................................................................... 9 Figure 4. REF_CLK Frequency vs. a Fixed CLK_OUT ............................................................................. 10 Figure 5. External Component Requirements for Crystal Circuit .........................................
PAGE 4
CS2200-OTP 1. PIN DESCRIPTION VD 1 10 M0 GND 2 9 M1 CLK_OUT 3 8 M2 AUX_OUT 4 7 XTI/REF_CLK TST_IN 5 6 XTO Pin Name # Pin Description VD 1 Digital Power (Input) - Positive power supply for the digital and analog sections. GND 2 Ground (Input) - Ground reference. CLK_OUT 3 PLL Clock Output (Output) - PLL clock output. AUX_OUT 4 Auxiliary Output (Output) - This pin outputs a buffered version of one of the input or output clocks, or a status signal, depending on configuration.
PAGE 5
CS2200-OTP 2. TYPICAL CONNECTION DIAGRAM 0.1 µF 1 µF +3.3 V VD M2 System Microcontroller M1 M0 CS2200-OTP 1 or 2 XTI/REF_CLK To circuitry which requires a low-jitter clock AUX_OUT To other circuitry or Microcontroller XTO GND Low-Jitter Timing Reference CLK_OUT TST_IN REF_CLK 1 N.C. x XTO or Crystal XTI 2 XTO 40 pF 40 pF Figure 1.
PAGE 6
CS2200-OTP 3. CHARACTERISTICS AND SPECIFICATIONS RECOMMENDED OPERATING CONDITIONS GND = 0 V; all voltages with respect to ground. (Note ?) Parameters DC Power Supply Symbol Min Typ Max Units VD 3.1 3.3 3.5 V TAC TAD -10 -40 - +70 +85 °C °C Ambient Operating Temperature (Power Applied) Commercial Grade Automotive Grade Notes: 1. Device functionality is not guaranteed or implied outside of these limits. Operation outside of these limits may adversely affect device reliability.
PAGE 7
CS2200-OTP AC ELECTRICAL CHARACTERISTICS Test Conditions (unless otherwise specified): VD = 3.1 V to 3.5 V; TA = -10°C to +70°C (Commercial Grade); TA = -40°C to +85°C (Automotive Grade); CL = 15 pF.
PAGE 8
CS2200-OTP 4. ARCHITECTURE OVERVIEW 4.1 Delta-Sigma Fractional-N Frequency Synthesizer The core of the CS2200 is a Delta-Sigma Fractional-N Frequency Synthesizer which has very high-resolution for Input/Output clock ratios, low phase noise, very wide range of output frequencies and the ability to quickly tune to a new frequency. In very simplistic terms, the Fractional-N Frequency Synthesizer multiplies the Timing Reference Clock by the value of N to generate the PLL output clock.
PAGE 9
CS2200-OTP 5. APPLICATIONS 5.1 One Time Programmability The one time programmable (OTP) circuitry in the CS2200-OTP allows for pre-configuration of the device prior to use in a system. There are two types of parameters that are used for device pre-configuration: modal and global. The modal parameters are features which, when grouped together, create a modal configuration set (see Figure 10 on page 17).
PAGE 10
CS2200-OTP example of how to determine the range of RefClk frequencies around 12 MHz to be used in order to achieve the lowest jitter PLL output at a frequency of 12.288 MHz is as follows: f L ≤ f RefClk ≤ f H where: CLK__OUT Jitter 180 *32/N f CLK__OUT Typical Base Band Jitter (psec) 31 f L = f CLK_OUT × ------ + 15kHz 32 = 12.288MHz × 0.96875 + 15kHz = 11.919MHz and 32 f H = f CLK_OUT × ------ – 15kHz 32 160 140 120 100 -15 kHz 80 +15 kHz 60 40 = 12.288MHz × 1 + 15kHz 20 -80 = 12.
PAGE 11
CS2200-OTP 5.3 Output to Input Frequency Ratio Configuration 5.3.1 User Defined Ratio (RUD) The User Defined Ratio, RUD, is a 32-bit un-signed fixed-point number which determines the basis for the desired input to output clock ratio. Up to four different ratios, Ratio0-3, can be stored in the CS2200’s one time programmable memory. Selection between the four ratios is achieved by the M[1:0] mode select pins. The 32-bit RUD is represented in a 12.
PAGE 12
CS2200-OTP Selection of the user defined ratio from the four stored ratios is made by using the M[1:0] pins. Referenced Control Parameter Definition M[1:0] pins.............................“M1 and M0 Mode Pin Functionality” on page 14 5.3.4 Ratio Configuration Summary The RUD is the user defined ratio for which up to four different values (Ratio0-3) can be stored in the one time programmable memory. The M[1:0] pins then select the user defined ratio to be used as well as the modal configuration set.
PAGE 13
CS2200-OTP 5.4 PLL Clock Output The PLL clock output pin (CLK_OUT) provides a buffered version of the output of the frequency synthesizer. The driver can be set to high-impedance with the M2 pin when the M2Config[1:0] global parameter is set to either 000 or 010. The output from the PLL automatically drives a static low condition while the PLL is unlocked (when the clock may be unreliable).
PAGE 14
CS2200-OTP 5.5 Auxiliary Output The auxiliary output pin (AUX_OUT) can be mapped, as shown in Figure 8, to one of three signals: reference clock (RefClk), additional PLL clock output (CLK_OUT), or a PLL lock indicator (Lock). The mux is controlled via the AuxOutSrc[1:0] modal parameter. If AUX_OUT is set to Lock, the AuxLockCfg global parameter is then used to control the output driver type and polarity of the LOCK signal (see section 6.3.1 on page 18).
PAGE 15
CS2200-OTP 5.6.2 M2 Mode Pin Functionality M2 usage is mapped to one of the optional special functions via the M2Config[2:0] global parameter. Depending on what M2 is mapped to, it will either act as an output enable/disable pin or override certain modal parameters. Figure 9 summarizes the available options and the following sections will describe each option in more detail.
PAGE 16
CS2200-OTP 5.7 Clock Output Stability Considerations 5.7.1 Output Switching The CS2200-OTP is designed such that re-configuration of the clock routing functions do not result in a partial clock period on any of the active outputs (CLK_OUT and/or AUX_OUT). In particular, enabling or disabling an output, changing the auxiliary output source between REF_CLK and CLK_OUT, and the automatic disabling of the output(s) during unlock will not cause a runt or partial clock period.
PAGE 17
CS2200-OTP 6. PARAMETER DESCRIPTIONS As mentioned in Section 5.1 on page 9, there are two different kinds of parameter configuration sets, Modal and Global. These configuration sets, shown in Figure 10, can be programmed in the field using the CDK2000 or preprogrammed at the factory. Please see “Programming Information” on page 21 for more details.
PAGE 18
CS2200-OTP 6.1.2 Auxiliary Output Source Selection (AuxOutSrc[1:0]) Selects the source of the AUX_OUT signal. AuxOutSrc[1:0] Auxiliary Output Source 00 RefClk. 01 Reserved. 10 CLK_OUT. 11 PLL Lock Status Indicator. Application: “Auxiliary Output” on page 14 Note: When set to 11, the AuxLockCfg global parameter sets the polarity and driver type (“AUX PLL Lock Output Configuration (AuxLockCfg)” on page 18). 6.
PAGE 19
CS2200-OTP 6.3.3 Enable PLL Clock Output on Unlock (ClkOutUnl) Defines the state of the PLL output during the PLL unlock condition. 6.3.4 ClkOutUnl Clock Output Enable Status 0 Clock outputs are driven ‘low’ when PLL is unlocked. 1 Clock outputs are always enabled (results in unpredictable output when PLL is unlocked). Application: “PLL Clock Output” on page 13 M2 Pin Configuration (M2Config[2:0]) Controls which special function is mapped to the M2 pin.
PAGE 20
CS2200-OTP 7. CALCULATING THE USER DEFINED RATIO Note: The software for use with the evaluation kit has built in tools to aid in calculating and converting the User Defined Ratio. This section is for those who would like to know more about how the User Defined Ratio is calculated and stored. Most calculators do not interpret the fixed point binary representation which the CS2200-OTP uses to define the output to input clock ratio (see Section 5.3.
PAGE 21
CS2200-OTP 8. PROGRAMMING INFORMATION Field programming of the CS2200-OTP is achieved using the hardware and software tools included with the CDK2000. The software tools can be downloaded from www.cirrus.com for evaluation prior to ordering a CDK. The CDK2000 is designed with built-in features to ease the process of programming small quantities of devices for prototype and small production builds.
PAGE 22
CS2200-OTP 9. PACKAGE DIMENSIONS 10L MSOP (3 mm BODY) PACKAGE DRAWING (Note 1) N D E11 c E A2 A ∝ e b A1 SIDE VIEW 1 2 3 END VIEW L SEATING PLANE L1 TOP VIEW DIM MIN INCHES NOM A A1 A2 b c D E E1 e L L1 -0 0.0295 0.0059 0.0031 ----0.0157 -- -----0.1181 BSC 0.1929 BSC 0.1181 BSC 0.0197 BSC 0.0236 0.0374 REF MAX 0.0433 0.0059 0.0374 0.0118 0.0091 ----0.0315 -- MIN MILLIMETERS NOM NOTE MAX -0 0.75 0.15 0.08 ----0.40 -- -----3.00 BSC 4.90 BSC 3.00 BSC 0.50 BSC 0.60 0.95 REF 1.10 0.
PAGE 23
CS2200-OTP 10.ORDERING INFORMATION The CS2200-OTP is ordered as an un-programmed device. The CS2200-OTP can also be factory programmed for large quantity orders. Please see “Programming Information” on page 21 for more details.
PAGE 24
CS2200-OTP Contacting Cirrus Logic Support For all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find one nearest you, go to www.cirrus.com. IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied).