User`s manual

Serial Control Port Configuration

CS485xx Hardware User’s Manual

after each byte, the master must provide an acknowledge clock pulse on SCP_CLK and release the

data line, SCP_SDA.

6. If the master has no more data words to write to the CS485xx, then proceed to step 8. If the master

has more data words to write to the CS485xx, then proceed to step 7.

7. The master should poll the SCP_BSY

signal until it goes high. If the SCP_BSY signal is low, it

indicates that the CS485xx is busy performing some task that requires pausing the serial control port.

Once the CS485xx is able to receive more data words, the SCP_BSY

signal will go high. Once the

SCP_BSY

signal is high, proceed to step 4.

Note: The DSP’s I

C port also implements clock stretching to indicate that the host should pause

communication. So the host has the option of checking for SCP_CLK held low rather than

SCP_BSY

low.

8. At the end of a data transfer, a stop condition must be sent. The stop condition is defined as the rising

edge of SCP_SDA while SCP_CLK is high.

3.2.2.4 Performing a Serial I

C Read

Information provided in this section is intended as a functional description indicating how to use the

configured serial control port to perform an I

C read from an external device (master) to the CS485xx DSP

(slave). The system designer must ensure that all timing constraints of the I

C Read Cycle are met (see the

CS485xx Data Sheet for timing specifications). I

C read transactions from the CS485xx will always involve

reading 4-byte words.

The flow diagram shown in Figure 3-9 illustrates the sequence of events that define the I

C read protocol for

SCP. This protocol is discussed in the high-level procedure in Section 3.2.2.4.1.