Datasheet

Data Sheet
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Figure 3. Sample Scenario Illustrating Transport ATM Traffic with ATM PWE over MPLS Network
Features at a Glance
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24 Channelized T1/E1/J1 ports per SPA
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Jitter and wander compliant to ITU G.823/824 traffic interface
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Compliant to IETF draft-ietf-pwe3-cesopsn-07.txt: Structure-aware TDM Circuit Emulation
Service over Packet Switched Network (CESoPSN
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Compliant to IETF RFC 4553: Structure-Agnostic TDM over Packet (SAToP)
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Bit-transparent data transport
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Protocol-independent data transport
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Support for CEoP PWE (CESoPSN and SAToP) transport using Real-Time Transport
Protocol (RTP)
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QoS using MPLS EXP
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Configurable payload size
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Synchronous, differential, and adaptive clock recovery schemes, with clock accuracy target
of 15ppb
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Configurable egress dejitter buffer up to 320 milliseconds
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Configurable idle pattern
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Support for ATM traffic classes: UBR, UBR+, VBR-nrt, VBR-rt, CBR
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Support for ATM QoS: VC and VP shaping
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Support for ATM IMA
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Support for ATM PWE (VC and VP mode cell relay)
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Support for ATM UNI (3.0, 3.1)
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Online insertion and removal (OIR) supported on Cisco 7600 platforms
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Overall SPA status LEDs
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Per-port status LEDs
Additional Features of the SPA
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Unframed (unstructured) T1/E1 transport
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N x 64 kbps and N x 56 kbps framed T1 transport
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N x 64 kbps framed E1 transport
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Grooming of up to 24 T1 or E1 separate data streams, each able to terminate on a
separate network destination
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BITS support
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Configurable clock source for each port