User's Manual

The CC2650 device is a wireless MCU targeting Bluetooth, ZigBee® and 6LoWPAN, and ZigBee
RF4CE remote control applications.
The device is a member of the CC26xx family of cost-effective, ultralow power, 2.4-GHz RF devices.
Very low active RF and MCU current and low-power mode current consumption provide excellent
battery lifetime and allow for operation on small coin cell batteries and in energy-harvesting
applications.
The CC2650 device contains a 32-bit ARM Cortex-M3 processor that runs at 48 MHz as the main
processor and a rich peripheral feature set that includes a unique ultralow power sensor controller.
This sensor controller is ideal for interfacing external sensors and for collecting analog and digital data
autonomously while the rest of the system is in sleep mode. Thus, the CC2650 device is ideal for
applications within a whole range of products including industrial, consumer electronics, and medical.
The Bluetooth Low Energy controller and the IEEE 802.15.4 MAC are embedded into ROM and are
partly running on a separate ARM Cortex-M0 processor. This architecture improves overall system
performance and power consumption and frees up flash memory for the application.
The SimpleLink CC2650 Wireless MCU contains an ARM Cortex-M3 (CM3) 32-bit CPU, which runs
the application and the higher layers of the protocol stack.
The CM3 processor provides a high-performance, low-cost platform that meets the system
requirements of minimal memory implementation, and low-power consumption, while delivering
outstanding computational performance and exceptional system response to interrupts.
CM3 features include the following:
• 32-bit ARM Cortex-M3 architecture optimized for small-footprint embedded applications
• Outstanding processing performance combined with fast interrupt handling
• ARM Thumb
®-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a
32-bit ARM core in a compact memory size usually associated with 8- and 16-bit devices, typically in
the range of a few kilobytes of memory for microcontroller-class applications:
– Single-cycle multiply instruction and hardware divide
– Atomic bit manipulation (bit-banding), delivering maximum memory use and streamlined peripheral
control
– Unaligned data access, enabling data to be efficiently packed into memory
• Fast code execution permits slower processor clock or increases sleep mode time
• Harvard architecture characterized by separate buses for instruction and data
• Efficient processor core, system, and memories
• Hardware division and fast digital-signal-processing oriented multiply accumulate
• Saturating arithmetic for signal processing
• Deterministic, high-performance interrupt handling for time-critical applications
• Enhanced system debug with extensive breakpoint and trace capabilities
• Serial wire trace reduces the number of pins required for debugging and tracing
• Migration from the ARM7™ processor family for better performance and power efficiency

Summary of content (5 pages)