Instruction Manual

DE
DANIELS
ELECTRONICS
3-4 Enhanced AM/FM Synthesizer Instruction Manual OS(R/T)-3(A/H) 29 - 470 MHz
unstable or spurious RF output signal. The "Unlocked" red LED will also be illuminated when the
PLL is unlocked. Check that the requested channel number is within the frequency range of the
particular synthesizer model. An unlocked condition may be rectified by adjusting the VCO tuning
elements as described in the following procedures (no adjustment requires for the multichannel AM
Synthesizers). Note that there are variations in alignment procedures between the three synthesizer
family members as described in the following sections.
3.5.5.1 VHF OS(R/T)-3H 29 - 71.4 MHz VCO Alignment
Refer to the "OS(R/T)-3H 29 - 71.4 MHz Analog Board Component Layout" diagrams and the
"OS(R/T)-3H 29 - 71.4 MHz Analog Board Schematic Diagram" located in section 4 on pages 1, 2
and 3.
Using a high impedance (10 MΩ) DC Voltmeter, measure the PLL control voltage at TP4 located
on the synthesizer module analog board (top). Access to TP4 is available through the synthesizer
top cover. Using a small standard blade screwdriver, carefully adjust the VCO fine frequency
"TUNE" trimmer capacitor C24 until a test point (TP4) voltage of approximately +2.3 Vdc is
obtained. Measured PLL loop control voltages below approximately +0.5 Vdc and above
approximately +4.5 Vdc indicates an "out of lock" synthesizer condition.
If a test point (TP4) voltage of approximately +2.3 Vdc is unattainable through adjustment to C24,
then the coarse frequency jumpers, JU2-JU4 require modification in order to pull the VCO tune
range within the adjustment range of fine tuning capacitor C24. The top synthesizer cover must be
removed in order to gain access to the coarse frequency jumpers. The coarse frequency jumpers
(JU2-JU4) may be considered to be a selectable binary weighted capacitor element with JU2 being
the most significant "bit" and JU4 being the least significant "bit". The tuning resolution size is
≈12 pF (JU4). If the tuning voltage remains higher than +2.3 Vdc, decrease the tuning jumper
setting by 1 "bit" position and re-adjust C24 in an attempt to achieve +2.3 Vdc at TP4. For
example, if coarse frequency jumpers JU2-JU4 are all installed and represented by 111 then a
decrease by 1 "bit" position (12 pF) is represented by a binary jumper selection of 110; jumper
JU4 is not installed and jumpers JU2, JU3 are installed. Continue to decrease the jumper position
one "bit" at a time until the synthesizer regains lock with TP4 adjusted (C24) for +2.3 Vdc. If the
tuning voltage remains lower than +2.3 Vdc, increase the jumper setting by 1 "bit" position and re-
adjust C24 in an attempt to achieve +2.3 Vdc at TP4. Repeat this procedure until +2.3 Vdc at TP4
is achieved.
It is important to check the loop control voltage at TP4 when multiple synthesizer channels have
been programmed. All channel selections should result in a TP4 voltage within a +1.0 to +4.0 Vdc
range. Adjust the fine tuning capacitor C24 to center multiple channel voltages symmetrically about
+2.3 Vdc. Channel selections beyond the tuning range capability of the synthesizer will result in
unlocked operation. The tuning range capability of all synthesizer models is listed in the
Specifications section (1.3) of this manual.