User manual

Code Mercenaries
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4.1 Pin descriptions
D+, D-
Differential data lines of USB. Put 24 series
resistors in these lines and connect them to the
USB cable or plug, see application circuit for
details. The IOW56-MOD already has the series
resistors.
For a PCB layout make sure to run these two
signals next to each other. USB data is a
differential signal that produces best signal quality
and lowest RF emission if the two lines are close to
each other.
P0.0..P0.7
First I/O port of the chip. These pins correspond
with the lowest 8 bits of the input or output (bits
0..7).
P1.0..P1.7
Second I/O Port. Corresponds to the bits 8..15.
P1.0 and P1.1 are used during production of the
IOW56. After power up and during the internal
start up process of IOW56 these two pins can
change their status a couple times. Take this into
account when connecting external circuits.
P2.0..P2.7
Third I/O Port. Corresponds to the bits 16..23.
P3.0..P3.7
Fourth I/O Port. Corresponds to the bits 24..31.
P4.0..P4.7
Fifth I/O Port. Corresponds to the bits 32..39.
P5.0..P5.7
Sixth I/O Port. Corresponds to the bits 40..47.
P6.0, P6.7
Seventh I/O Port. Corresponds to the bits 48 and
55. This port has only two pins. Always write the
unused bits as "1".
GND
Power supply ground.
Vcc
Supply voltage.
A 100nF ceramic capacitor is required to be
connected directly to each pair of the power supply
pins. The IOW56-MOD already has the capacitors.
The MLFP56 package has a center ground pad that
must be connected to ground (Vss).
4.2 Special mode pin functions
IO-Warrior56 supports various higher level
functions including IIC, SPI, LED matrix, key
matrix, and driving various LCD modules.
Handling IIC via the normal generic I/O would be
very slow as each edge of data and clock would
have to be transmitted separately. At a rate of 1000
such transactions per second (which is the
maximum IO-Warrior56 is allowed by USB
specifications) the maximum bit rate and
throughput would be around 250 bits/sec.
To make IIC and other devices usable IO-Warrior
implements the special mode functions. By
handling the IIC inside IO-Warrior the actual data
rate is approaching the theoretical maximum.
When any of the special mode functions is
activated the corresponding pins will no longer
respond as generic I/O pins but are under control of
the activated special mode function.
4.2.1 IIC Mode pins
IO-Warrior56 can act as an IIC master with 50,
100, or 400kbit/sec data rate. Multi master mode is
supported.
IO-Warrior56 supports clock stretching handshake
with slaves that need throttling of the data flow.
The following pins get reassigned when the IIC
function is enabled:
These pins will no longer be affected by the data
sent via the normal port setting command. Both
pins have internal pull up resistors and open drain
drivers. They can be connected direct to IIC
compatible chips. Optionally the internal pull up
resistors can be disabled by setting the appropriate
flag in the IICenable command. This allows
operation with lower voltage IIC slaves.
Function IOW56
SCL
SDA
P1.7
P1.5
V 1.0.3, November 6nd 2012 for chip version V1.1.0.1