User's Manual

CMX-ZG03 Page 9
4.1. Pin Assignment
Symbol
Type
[1]
Description
DO0/SPICLK/PWM2
[2]
O
DO0 DO0
SPICLK SPI-bus master clock output
PWM2 PWM2 output
DO1/SPIMISO/PWM3
[3]
I/O
DO1 DO1
SPIMISO SPI-bus Master In, Slave Out input
PWM3 PWM3 output
DIO18/SPIMOSI
I/O
DIO18 DIO18
SPIMOSI SPI-bus Master Out Slave In output
DIO19/SPISEL0
I/O
DIO19 DIO19
SPISEL0 SPI-bus Master Select Output 0
DIO0/ADO/SPISEL1/ADC3
I/O
DIO0 DIO0
ADO antenna diversity odd output
SPISEL1 SPI-bus master select output 1
ADC3 ADC input: ADC3
DIO1/ADE/SPISEL2/ADC4/PC0
I/O
DIO1 DIO1
ADE antenna diversity even output
SPISEL2 SPI-bus master select output 2
ADC4 ADC input: ADC4
PC0 pulse counter 0 input
DIO2/RFRX/TIM0CK_GT/ADC5
[4]
I/O
DIO2 DIO2
RFRX radio receives control output
TIM0CK_GT timer0 clock/gate input
ADC5 ADC input: ADC5
DIO3/RFTX/TIM0CAP/ADC6
[4]
I/O
DIO3 DIO3
RFTX radio transmit control output
TIM0CAP timer0 capture input
ADC6 ADC input: ADC6
DIO4/CTS0/JTAG_TCK/TIM0OUT/PC0
I/O
DIO4 DIO4
CTS0 UART 0 clear to send input
JTAG_TCK JTAG CLK input
TIM0OUT timer0 PWM output
PC0 pulse counter 0 input
DIO5/RTS0/JTAG_TMS/PWM1/PC1
I/O
DIO5 DIO5
RTS0 UART 0 request to send output
JTAG_TMS JTAG mode select input
PWM1 PWM1 output
PC1 pulse counter 1 input
DIO6/TXD0/JTAG_TDO/PWM2
I/O
DIO6 DIO6
TXD0 UART 0 transmit data output
JTAG_TDO JTAG data output
PWM2 PWM2 data output