Technical Reference Guide For Compaq Deskpro EXS and Compaq Deskpro Workstation 300 Personal Computers Featuring the Intel Pentium 4 Processor And the Intel 850 Chipset
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Technical Reference Guide ii Compaq Deskpro EXS and Workstation 300 Personal Computers Featuring the Intel Pentium 4 Processor First Edition –- December 2000
Technical Reference Guide TABLE OF CONTENTS CHAPTER 1 INTRODUCTION.................................................................................................................. 1.1 ABOUT THIS GUIDE ................................................................................................................ 1-1 1.1.1 USING THIS GUIDE.......................................................................................................... 1-1 1.1.2 ADDITIONAL INFORMATION SOURCES ......................
Technical Reference Guide CHAPTER 4 SYSTEM SUPPORT.............................................................................................................. 4.1 INTRODUCTION ....................................................................................................................... 4-1 4.2 PCI BUS OVERVIEW ................................................................................................................ 4-2 4.2.1 PCI BUS TRANSACTIONS ............................................
Technical Reference Guide 5.6 KEYBOARD/POINTING DEVICE INTERFACE................................................................... 5-16 5.6.1 KEYBOARD INTERFACE OPERATION....................................................................... 5-16 5.6.2 POINTING DEVICE INTERFACE OPERATION .......................................................... 5-18 5.6.3 KEYBOARD/POINTING DEVICE INTERFACE PROGRAMMING........................... 5-18 5.6.4 KEYBOARD/POINTING DEVICE INTERFACE CONNECTOR......................
Technical Reference Guide 7.7 POWER MANAGEMENT FUNCTIONS ................................................................................ 7-17 7.7.1 INDEPENDENT PM SUPPORT ...................................................................................... 7-17 7.7.2 ACPI SUPPORT................................................................................................................ 7-19 7.7.3 APM 1.2 SUPPORT .........................................................................................
Technical Reference Guide APPENDIX D COMPAQ/NVIDIA TNT2 PRO AGP GRAPHICS CARD.............................................. D.1 INTRODUCTION ...................................................................................................................... D-1 D.2 FUNCTIONAL DESCRIPTION................................................................................................ D-2 D.3 DISPLAY MODES ......................................................................................................
Technical Reference Guide APPENDIX H COMPAQ/MATROX MILLENNIUM G450 AGP GRAPHICS CARD ........................ H.1 INTRODUCTION ...................................................................................................................... H-1 H.2 FUNCTIONAL DESCRIPTION................................................................................................ H-2 H.3 DISPLAY MODES ....................................................................................................................
Technical Reference Guide K.4.2 AOL/SOS CONNECTOR .................................................................................................. K-6 K.4.3 SMBUS CONNECTOR ..................................................................................................... K-7 K.4.4 WOL CONNECTOR.......................................................................................................... K-7 K.5 ADAPTER SPECIFICATIONS .........................................................................
Technical Reference Guide LIST OF FIGURES FIGURE 2–1. FIGURE 2–2. FIGURE 2–3. FIGURE 2–4. FIGURE 2–5. FIGURE 2–6. FIGURE 2–7. COMPAQ DESKPRO PERSONAL COMPUTERS WITH MONITORS................................................ 2-1 FRONT CABINET VIEWS ......................................................................................................... 2-4 REAR CABINET VIEW .............................................................................................................
Technical Reference Guide FIGURE C–1. KEYSTROKE PROCESSING ELEMENTS, BLOCK DIAGRAM ......................................................C-2 FIGURE C–2. PS/2 KEYBOARD-TO-SYSTEM TRANSMISSION, TIMING DIAGRAM ........................................C-3 FIGURE C–3. U.S. ENGLISH (101-KEY) KEYBOARD KEY POSITIONS..........................................................C-5 FIGURE C–4. NATIONAL (102-KEY) KEYBOARD KEY POSITIONS ...............................................................C-5 FIGURE C–5. U.S.
Technical Reference Guide FIGURE L–1. COMPAQ/ADAPTEC 29160N SCSI HOST ADAPTER CARD LAYOUT (PCA# 157342-001) ..... L-1 FIGURE L–2. COMPAQ/ADAPTEC ULTRA SCSI ADAPTER CARD BLOCK DIAGRAM .................................... L-2 FIGURE L–3. EXTERNAL ULTRA SCSI CONNECTOR (50-PIN) ....................................................................... L-4 FIGURE L–4. INTERNAL 50-PIN ULTRA SCSI CONNECTOR .......................................................................... L-5 FIGURE L–5.
Technical Reference Guide LIST OF TABLES TABLE 1–1. ACRONYMS AND ABBREVIATIONS .......................................................................................... 1-3 TABLE 2-1. STANDARD FEATURE DIFFERENCE MATRIX ............................................................................. 2-2 TABLE 2-2. CHIPSET COMPARISON ........................................................................................................... 2-11 TABLE 2-3. SUPPORT COMPONENT FUNCTIONS ...........................
Technical Reference Guide TABLE 5–19. TABLE 5–20. TABLE 5–21. TABLE 5–22. TABLE 5–23. TABLE 5–24. TABLE 5–25. USB CONNECTOR PINOUT .................................................................................................. 5-25 USB CABLE LENGTH DATA ................................................................................................ 5-25 AC’97 AUDIO CONTROLLER PCI CONFIGURATION REGISTERS........................................... 5-31 AC’97 AUDIO CODEC CONTROL REGISTERS.................
Technical Reference Guide TABLE H-1. MATROX MILLENNIUM G450 GRAPHICS DISPLAY MODES .......................................................H-3 TABLE H-2. MONITOR POWER MANAGEMENT CONDITIONS .......................................................................H-4 TABLE H-3. DB-15 MONITOR CONNECTOR PINOUT...................................................................................H-5 TABLE H–4. VIDEO IN CONNECTOR PINOUT ..................................................................................
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Technical Reference Guide Chapter 1 INTRODUCTION 1. Chapter 1 INTRODUCTION 1.1 ABOUT THIS GUIDE This guide provides technical information about Compaq Deskpro Personal Computers that feature the Intel Pentium 4 processor and the Intel 850 chipset. This document includes information regarding system design, function, and features that can be used by programmers, engineers, technicians, and system administrators.
Chapter 1 Introduction 1.3 NOTATIONAL CONVENTIONS 1.3.1 VALUES Hexadecimal values are indicated by a numerical or alpha-numerical value followed by the letter “h.” Binary values are indicated by a value of ones and zeros followed by the letter “b.” Numerical values that have no succeeding letter can be assumed to be decimal. 1.3.2 RANGES Ranges or limits for a parameter are shown using the following methods: Example A: Example B: Bits <7..4> = bits 7, 6, 5, and 4.
Technical Reference Guide 1.4 COMMON ACRONYMS AND ABBREVIATIONS Table 1-1 lists the acronyms and abbreviations used in this guide. Table 1–1. Acronyms and Abbreviations Table 1-1.
Chapter 1 Introduction Table 1-1.
Technical Reference Guide Table 1-1.
Chapter 1 Introduction Table 1-1.
Technical Reference Guide Chapter 2 SYSTEM OVERVIEW 2. Chapter 2 SYSTEM OVERVIEW 2.1 INTRODUCTION Compaq Deskpro Personal Computers (Figure 2-1) featuring the Intel Pentium 4 processor provide very high performance for advanced e-business and multimedia applications. This guide covers Compaq Deskpro EXS Minitower and the Compaq Deskpro Workstation 300 models that feature the Intel Pentium 4 processor and the Intel 850 chipset. Compaq Deskpro EXS Minitower Compaq Deskpro Workstation 300 Figure 2–1.
Chapter 2 System Overview 2.2 FEATURES AND OPTIONS This section describes the standard features and available options. 2.2.1 STANDARD FEATURES The following standard features are included on all models: ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ Intel Pentium 4 processor in PPGA423 package Intel 850 chipset Dual-channel Direct Rambus system memory Five 33-MHz/32-bit PCI slots One AGP slot Embedded Sound Blaster 128 PCI audio 3.5 inch, 1.
Technical Reference Guide 2.2.
Chapter 2 System Overview 2.3 MECHANICAL DESIGN The following subsections describe the mechanical (physical) aspects of the covered Compaq Deskpro models. ! CAUTION: Voltages are present within the system unit whenever the unit is plugged into a live AC outlet, regardless of the “Power On” condition. Always disconnect the power cable from the power outlet and/or from the system unit before handling the system unit in any way.
Technical Reference Guide 2.3.1.2 Rear View Figure 2-3 shows the rear cabinet layout of the controls and connectors.
Chapter 2 System Overview 2.3.2 CHASSIS LAYOUT For detailed information on servicing the chassis refer to the multimedia training CD-ROM and/or the maintenance and service guide for these systems. Figure 2-4 shows the layout for the system in a minitower configuration. This chassis provides: ♦ ♦ ♦ Three 5 ¼-inch drive bays and two 3 ½-inch drive bays Easy access to expansion slots and all socketed system board components. Space for either a µATX- or full ATX-type system board.
Technical Reference Guide 2.3.3 BOARD LAYOUT These systems use an ATX-type system board. Figure 2-5 shows the location of sockets, connectors, headers, switches, jumpers, and LEDs.
Chapter 2 System Overview 2.4 SYSTEM ARCHITECTURE These systems feature architecture based on the Intel Pentium 4 processor and the Intel 850 chipset (Figure 2-6). These components are designed to compliment each other to provide very high desktop/minitower performance. Key technical highlights of this architecture include: ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ 1.4 or 1.
Technical Reference Guide Pentium 4 Processor RGB 400- MHz FSB Graphics Controller Card 850 Chipset Channel A RDRAM Bus 82850 MCH AGP 4X I/F AGP Slot RDRAM Cntlr. Channel B RDRAM Bus PC800 RIMM Pair(s) PC800 RIMM Pair(s) Hub Link Bus Pri. IDE I/F UATA/100 Hard Drive Sec. IDE I/F 82801BA ICH2 USB I/F (4) LPC Bus Serial I/F (2) Parallel I/F LPC47B357 I/O Controller Keyboard/ Mouse I/F CD Audio Diskette I/F 82802 FWH Beep Audio Audio Subsystem 33-MHz 32-Bit PCI Bus V.
Chapter 2 System Overview 2.4.1 PENTIUM 4 PROCESSOR These systems feature the Intel Pentium 4 processor featuring Intel’s NetBurst MicroArchitecture. This processor is backward-compatible with software written for the Pentium III/II, Pentium MMX, Pentium Pro, Pentium, and x86 microprocessors.
Technical Reference Guide 2.4.2 CHIPSET The chipset consists of a Memory Controller Hub (MCH), an I/O Controller Hub (ICH), and a FirmWare Hub (FWH). Table 2-2 lists the integrated functions provided by the two types of chipsets used in these systems. Table 2-2. Chipset Comparison Table 2-2.
Chapter 2 System Overview 2.4.4 SYSTEM MEMORY These systems feature a dual-channel Direct Rambus (RDRAM) architecture. Capable of a peak data throughput of 3.2 GB/sec., this high-performance memory design represents a new generation of memory subsystems that can keep pace with ever-increasing processor performance. These systems each provide a total of four RIMM sockets, all of which will be populated with either PC800 RDRAM memory modules (RIMMs) or continuity modules (CRIMMs).
Technical Reference Guide 2.4.8 GRAPHICS SUBSYSTEM Each of these systems provides an AGP slot that accommodates a Type 1 or Type 2 AGP graphics adapter (1.5-V only). Table 2-4 lists the key features of the types of graphics adapters available as standard in these systems: Table 2-4. Standard AGP Graphics Card Comparison Table 2-4. Standard AGP Graphics Card Comparison Std. Config. In Recommended for: Bus Type Mem. Amount Mem. Type DAC Speed Max. 2D Res.
Chapter 2 System Overview 2.4.9 AUDIO SUBSYSTEM All models feature an embedded Sound Blaster 128 PCI audio system using the AC’97 ver. 2.1 specification-based design. The subsystem features a Creative Labs, Inc. ES1373 audio controller and a Cirrus Logic CS4297A audio codec. The output of the audio codec is applied to a 3-watt amplifier that drives the chassis’ internal speaker.
Technical Reference Guide Table 2-7. Physical Specifications Table 2-7. Physical Specifications Parameter Desktop Configuration Minitower Configuration Height 6.60 in (16.76 cm) 17.65 in (44.83 cm) Width 17.65 in (44.83 cm) 6.60 in (16.76 cm) Depth 17.11 in (43.46 cm) 17.11 in (43.46 cm) Weight (nom.) [1] 26 lb (11.8 kg) 26 lb (11.8 kg) Maximum Supported Weight [2] 100 N/A NOTES: [1] System weight may vary depending on installed drives/peripherals.
Chapter 2 System Overview Table 2-9. 48x CD-ROM Drive Specifications Table 2-9. 48x CD-ROM Drive Specifications (SP# 187217-B21) Parameter Interface Type Transfer Rate: Max. Sustained Burst Media Type Measurement IDE 4800 KB/s 16.
Technical Reference Guide Chapter 3 PROCESSOR/ MEMORY SUBSYSTEM 3. Chapter 3 PROCESSOR/MEMORY SUBSYSTEM 3.1 INTRODUCTION This chapter describes the processor/memory subsystem of Compaq Deskpro Personal Computers featuring the Pentium 4 processor. These systems feature the Pentium 4 processor and the 850 chipset (Figure 3-1). The 82850 MCH component of the 850 chipset supports two Direct Rambus channels, each channel accommodating one or two RIMMs.
Chapter 3 Processor/Memory Subsystem 3.2 PENTIUM 4 PROCESSOR These systems each feature an Intel Pentium 4 processor in a FC-PGA423 package mounted with a passive heat sink in a PGA423 (W-type) zero-insertion force socket. The mounting socket allows the processor to be easily changed for servicing and/or upgrading. 3.2.1 PROCESSOR OVERVIEW The 1.4-/1.5-GHz Intel Pentium 4 processor represents the latest generation of Intel’s IA32-class of processors.
Technical Reference Guide Figure 3-1 illustrates the internal architecture of the Pentium 4 processor. Pentium 4 Processor Branch Prediction Execution Trace Cache CPU Rapid Exe. Eng. ALUs 128-bit Integer FPU Out-ofOrder Core L1 Data Cache FSB I/F 256-KB 8-Way L2 Adv. Transfer Cache ALU Speed: 2.8 GHz w/Pentium 4 @ 1.4 GHz 3.0 GHz w/Pentium 4 @ 1.5 GHz Core Speed: 1.4 GHz w/Pentium 4 @ 1.4 GHz 1.5 GHz w/Pentium 4 @ 1.5 GHz FSB Speed: 400 MHz (Data transfer rate) Figure 3–2.
Chapter 3 Processor/Memory Subsystem The Pentium 4 processor is software-compatible with Celeron, Pentium II, Pentium MMX, Pentium, and x86 processors, but will require the latest versions of operating system software to take advantage of the Streaming SIMD extensions (SSE2). 3.2.2 PROCESSOR UPGRADING All units use the PGA423 ZIF mounting socket and ship with the Pentium 4 processor in a FlipChip (FC-PGA423) package installed with a passive heat sink.
Technical Reference Guide 3.3 MEMORY SUBSYSTEM The 82850 MCH features Direct Rambus technology and supports two Rambus channels, each channel supporting up to two Rambus DRAM modules (RIMMs). Direct Rambus technology provides a significant improvement in performance over DRAM/SDRAM memory designs and allows the system memory to keep pace with increasing processor performance. Rambus technology implements RDRAM devices accessed over a channel specifically designed for high speed operations.
Chapter 3 Processor/Memory Subsystem 3.3.1 RAMBUS ATTRIBUTES To ensure signal quality during high-speed memory transfers, the Rambus interface design departs from previous memory interface designs in several key aspects (Figure 3-4). Rambus uses a daisychained signal distribution system that requires that all memory sockets be populated with either a RIMM or a continuity module (CRIMM) in order to maintain constant load impedance. Rambus Signaling Levels (RSL) uses a 1.4-volt reference with a 0.
Technical Reference Guide 3.3.2 RAMBUS CHANNEL TRANSACTIONS Transactions on the Rambus Channel involve packets of control (row or column) bits and packets of data bits. Each packet consists of eight segments, with even segments transferred on falling clock edges and odd segments transferred on rising clock edges.
Chapter 3 Processor/Memory Subsystem 3.3.3 RDRAM POWER MANAGEMENT The Rambus architecture provides for power management of each RDRAM device on a RIMM. RDRAM power management control is compatible with but may also work independently of ACPI. Power management of RDRAM is handled through control packets as well as the serial bus.
Technical Reference Guide The memory controller and RDRAM are configured by BIOS during POST. Refer to Chapter 8 for the configuration procedure performed by BIOS. Figure 3-6 shows the system memory map. FFFF FFFFh FFE0 0000h FFDF FFFFh FEC1 0000h FEC0 FFFFh FEC0 0000h FEBF FFFFh High BIOS Area (2 MB) 4 GB PCI Memory (18 MB) APIC Config.
Chapter 3 Processor/Memory Subsystem 3.4 SUBSYSTEM CONFIGURATION The MCH component provides the configuration function for the processor/memory subsystem. Table 3-1 lists the configuration registers used for setting and checking such parameters as memory control and PCI bus operation. These registers reside in the PCI Configuration Space and accessed using the methods described in Chapter 4, section 4.2. Table 3–1. Host/PCI Bridge Configuration Registers (GMCH, Function 0) Table 3-1.
Technical Reference Guide Chapter 4 SYSTEM SUPPORT 4. Chapter 4 SYSTEM SUPPORT 4.1 INTRODUCTION This chapter covers subjects dealing with basic system architecture and covers the following topics: ♦ ♦ ♦ ♦ ♦ ♦ ♦ PCI bus overview (4.2) AGP bus overview (4.3) System resources (4.4) System clock distribution (4.5) Real-time clock and configuration memory (4.6) System management (4.7) Register map and miscellaneous functions (4.
Chapter 4 System Support 4.2 PCI BUS OVERVIEW NOTE: This section describes the PCI bus in general and highlights bus implementation in this particular system. For detailed information regarding PCI bus operation, refer to the PCI Local Bus Specification Revision 2.2. This system implements a 32-bit Peripheral Component Interconnect (PCI) bus (spec. 2.2) operating at 33 MHz. The PCI bus handles address/data transfers through the identification of devices and functions on the bus.
Technical Reference Guide 4.2.1 PCI BUS TRANSACTIONS The PCI bus consists of a 32-bit path (AD31-00 lines) that uses a multiplexed scheme for handling both address and data transfers. A bus transaction consists of an address cycle and one or more data cycles, with each cycle requiring a clock (PCICLK) cycle.
Chapter 4 System Support Two types of configuration cycles are used. A Type 0 (zero) cycle is targeted to a device on the PCI bus on which the cycle is running. A Type 1 cycle is targeted to a device on a downstream PCI bus as identified by bus number bits <23..16>.
Technical Reference Guide The register index (CF8h, bits <7..2>) identifies the 32-bit location within the configuration space of the PCI device to be accessed. All PCI devices can contain up to 256 bytes of configuration data (Figure 4-3), of which the first 64 bytes comprise the configuration space header. 31 24 23 16 15 8 7 0 Register Index 31 24 23 16 15 8 7 0 FCh FCh Device-Specific Area Device-Specific Area Min. Lat. Min. GNT Int. Pin Int.
Chapter 4 System Support 4.2.2 PCI BUS MASTER ARBITRATION The PCI bus supports a bus master/target arbitration scheme. A bus master is a device that has been granted control of the bus for the purpose of initiating a transaction. A target is a device that is the recipient of a transaction. The Request (REQ), Grant (GNT), and FRAME signals are used by PCI bus masters for gaining access to the PCI bus.
Technical Reference Guide 4.2.3 OPTION ROM MAPPING During POST, the PCI bus is scanned for devices that contain their own specific firmware in ROM. Such option ROM data, if detected, is loaded into system memory’s DOS compatibility area (refer to the system memory map shown in chapter 3). 4.2.4 PCI INTERRUPTS Eight interrupt signals (INTA- thru INTH-) are available for use by PCI devices. These signals may be generated by on-board PCI devices or by devices installed in the PCI slots.
Chapter 4 System Support 4.2.7 PCI CONFIGURATION PCI bus operations require the configuration of certain parameters such as PCI IRQ routing, DMA channel configuration, RTC control, port decode ranges, and power management options. These parameters are handled by the LPC I/F bridge function (PCI function #0, device 31) of the ICH component and configured through the PCI configuration space registers listed in Table 4-3. Configuration is provided by BIOS at power-up but re-configurable by software.
Technical Reference Guide 4.2.8 PCI CONNECTOR B94 B62 A62 A94 B52 A52 B1 B49 A1 A49 Figure 4-4. PCI Bus Connector (32-Bit Type) Table 4-4. PCI Bus Connector Pinout Table 4-4. PCI Bus Connector Pinout Pin 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 -- B Signal -12 VDC TCK GND TDO +5 VDC +5 VDC INTBINTDPRSNT1RSVD PRSNT2GND GND RSVD GND CLK GND REQ+5 VDC AD31 AD29 GND AD27 AD25 +3.3 VDC C/BE3AD23 GND AD21 AD19 +3.
Chapter 4 System Support 4.3 AGP BUS OVERVIEW NOTE: This section provides a brief description of AGP bus operation. For a detailed description of AGP bus operations as supported by these systems refer to the AGP Interface Specification Rev. 2.0 available at the following AGP forum web site: http://www.agpforum.org/index.htm The Accelerated Graphics Port (AGP) bus is specifically designed as an economical yet highperformance interface for graphics adapters, especially those designed for 3D operations.
Technical Reference Guide 4.3.1.1 Data Request Requesting data is accomplished in one of two ways; either multiplexed addressing (using the AD lines for addressing/data) or demultiplexed (“sideband”) addressing (using the SBA lines for addressing only and the AD lines for data only). Even though there are only eight SBA lines (as opposed to the 32 AD lines) sideband addressing maximizes efficiency and throughput by allowing the AD lines to be exclusively used for data transfers.
Chapter 4 System Support AGP 2X Transfers During AGP 2X transfers, clocking is basically the same as in 1X transfers except that the 66-MHz CLK signal is used to qualify only the control signals. The data bytes are latched by an additional strobe (AD_STBx) signal so that an 8-byte transfer occurs in one CLK cycle (Figure 4-6). The first four bytes (DnA) are latched by the receiving agent on the falling edge of AD_STBx and the second four bytes (DnB) are latched on the rising edge of AD_STBx.
Technical Reference Guide 4.3.2 AGP CONFIGURATION AGP bus operations require the configuration of certain parameters involving system memory access by the AGP graphics adapter. The AGP bus interface is configured as a PCI device integrated within the north bridge (MCH, device 1) component. The AGP function is, from the PCI bus perspective, treated essentially as a PCI/PCI bridge and configured through PCI configuration registers (Table 4-6). Configuration is accomplished by BIOS during POST.
Chapter 4 System Support 4.3.3 AGP CONNECTOR B94 A94 A1 B1 A41 A46 B41 B46 A66 B66 Figure 4-8. 1.5-Volt AGP Bus Connector Table 4-6. AGP Bus Connector Pinout Table 4-6. AGP Bus Connector Pinout Pin A Signal B Signal Pin A Signal B Signal Pin A Signal B Signal 01 +12 VDC OVRCNT23 GND GND 45 KEY KEY 02 Type Det5.0 VDC 24 Reserved VDD3 Aux 46 TRDYDEVSEL03 Reserved 5.
Technical Reference Guide 4.4 SYSTEM RESOURCES This section describes the availability and basic control of major subsystems, otherwise known as resource allocation or simply “system resources.” System resources are provided on a priority basis through hardware interrupts and DMA requests and grants. 4.4.1 INTERRUPTS The microprocessor uses two types of hardware interrupts; maskable and nonmaskable.
Chapter 4 System Support 8259 Mode In 8259-Mode, interrupts IRQ0-IRQ15 are handled in the conventional (AT-system) method using logic that is the equivalent of two 8259 interrupt controllers. Table 4-7 lists the standard source configuration for maskable interrupts and their priorities in 8259 mode. If more than one interrupt is pending, the highest priority (lowest number) is processed first. Table 4-7. Maskable Interrupt Priorities and Assignments Table 4-7.
Technical Reference Guide NOTE: The APIC mode is supported by Windows NT/2000 operating systems. Systems using the Windows 95 or 98 operating system will need to run in 8259 mode. The mode is selectable through the Setup utility (access with F10 key during boot sequence). Maskable Interrupt processing is controlled and monitored through standard AT-type I/O-mapped registers. These registers are listed in Table 4-8. Table 4-8. Maskable Interrupt Control Registers Table 4-8.
Chapter 4 System Support The NMI Status Register at I/O port 061h contains NMI source and status data as follows: NMI Status Register 61h Bit 7 6 5 4 3 2 1 0 Function NMI Status: 0 = No NMI from system board parity error.
Technical Reference Guide 4.4.2 DIRECT MEMORY ACCESS Direct Memory Access (DMA) is a method by which a device accesses system memory without involving the microprocessor. Although the DMA method has been traditionally used to transfer blocks of data to or from an ISA I/O device, PCI devices may also use DMA operation as well. The DMA method reduces the amount of CPU interactions with memory, freeing the CPU for other processing tasks. NOTE: This section describes DMA in general.
Chapter 4 System Support 4.5 SYSTEM CLOCK DISTRIBUTION These systems use an Intel CK-type clock generator and crystal for generating the clock signals required by the system board components. Table 4-10 lists the system board clock signals and how they are distributed. Table 4-10. Clock Generation and Distribution Table 4-10 Clock Generation and Distribution Frequncy 400 MHz 100 MHz 66 MHz 48 MHz 33 MHz 14.
Technical Reference Guide 4.6.1 CLEARING CMOS The contents of configuration memory (including the Power-On Password) can be cleared by the following procedures: 1. 2. 3. 4. 5. 6. 7. Turn off the unit. Disconnect the AC power cord from the outlet and/or system unit. Remove the chassis hood (cover) and insure that no LEDs on the system board are illuminated. Press and release the CMOS clear button on the system board. Replace the chassis hood (cover).
Chapter 4 System Support 4.6.2 CMOS ARCHIVE AND RESTORE During the boot sequence the BIOS saves a copy of NVRAM (CMOS contents, password(s) and other system variables) in a portion of the flash ROM. Should the system become un-usable, the last good copy of NVRAM data can be restored with the Power Button Override function. This function is invoked with the following procedure: 1. 2. With the unit powered down, press and release the power button.
Technical Reference Guide RTC Control Register A, Byte 0Ah Bit 7 6..4 3..0 Function Update in Progress. Read only. 0 = Time update will not occur before 2444 us 1 = Time update will occur within 2444 us Divider Chain Control. R/W. 00x = Oscillator disabled. 010 = Normal operation (time base frequency = 32.768 KHz). 11x = Divider chain reset. Periodic Interrupt Control. R/W. Specifies the periodic interrupt interval. 0000 = none 1000 = 3.90625 ms 0001 = 3.90625 ms 1001 = 7.8125 ms 0010 = 7.
Chapter 4 System Support Configuration Byte 0Eh, Diagnostic Status Default Value = 00h This byte contains diagnostic status data. Configuration Byte 0Fh, System Reset Code Default Value = 00h This byte contains the system reset code. Configuration Byte 10h, Diskette Drive Type Bit Function 7..4 Primary (Drive A) Diskette Drive Type 3..0 Secondary (Drive B) Diskette Drive Type Valid values for bits <7..4> and bits <3..0>: 0000 = Not installed 0001 = 360-KB drive 0010 = 1.
Technical Reference Guide Configuration Byte 13h, Security Functions Default Value = 00h Bit Function 7 Reserved 6 QuickBlank Enable After Standby: 0 = Disable 1 = Enable 5 Administrator Password: 0 = Not present 1 = Present 4 Reserved 3 Diskette Boot Enable: 0 = Enable 1 = Disable 2 QuickLock Enable: 0 = Disable 1 = Enable 1 Network Server Mode/Security Lock Override: 0 = Disable 1 = Enable 0 Password State (Set by BIOS at Power-up) 0 = Not set 1 = Set Configuration Byte 14h, Equipment Installed Default
Chapter 4 System Support Configuration Bytes 19h-1Ch, Hard Drive Types Byte 19h contains the hard drive type for drive 1 of the primary controller if byte 12h bits <7..4> hold 1111b. Byte 1Ah contains the hard drive type for drive 2 of the primary controller if byte 12h bits <3..0> hold 1111b. Bytes1Bh and 1Ch contain the hard drive types for hard drives 1 and 2 of the secondary controller.
Technical Reference Guide Configuration Byte 26h, Auxiliary Peripheral Configuration Default Value = 00h Bit Function 7,6 I/O Delay Select 00 = 420 ns (default) 01 = 300 ns 10 = 2600 ns 11 = 540 ns 5 Alternative A20 Switching 0 = Disable port 92 mode 1 = Enable port 92 mode 4 Bi-directional Print Port Mode 0 = Disabled 1 = Enabled 3 Graphics Type 0 = Color 1 = Monochrome 2 Hard Drive Primary/Secondary Address Select: 0 = Primary 1 = Secondary 1 Diskette I/O Port 0 = Primary 1 = Secondary 0 Diskette I/O Por
Chapter 4 System Support Configuration Byte 29h, Miscellaneous Configuration Data Default Value = 00h Bit Function 7..5 Reserved 4 Primary Hard Drive Enable (Non-PCI IDE Controllers) 0 = Disable 1 = Enable 3..0 Reserved Configuration Byte 2Ah, Hard Drive Timeout Default Value = 02h Bit Function 7..5 Reserved 4..
Technical Reference Guide Configuration Byte 2Dh, Additional Flags Default Value = 00h Bit Function 7..5 Reserved 4 Memory Test 0 = Test memory on power up only 1 = Test memory on warm boot 3 POST Error Handling (BIOS Defined) 0 = Display “Press F1 to Continue” on error 1 = Skip F1 message 2..0 Reserved Configuration Byte 2Eh, 2Fh, Checksum These bytes hold the checksum of bytes 10h to 2Dh.
Chapter 4 System Support Configuration Byte 35h, APM Status Flags Default Value = 11h Bit Function 7..
Technical Reference Guide 4.7 SYSTEM MANAGEMENT This section describes functions having to do with security, power management, temperature, and overall status. These functions are handled by hardware and firmware (BIOS) and generally configured through the Setup utility. 4.7.1 SECURITY FUNCTIONS These systems include various features that provide different levels of security.
Chapter 4 System Support 4.7.1.3 Cable Lock Provision These systems include a chassis cutout (on the rear panel) for the attachment of a cable lock mechanism. 4.7.1.4 I/O Interface Security The serial, parallel, USB, and diskette interfaces may be disabled individually through the Setup utility to guard against unauthorized access to a system. In addition, the ability to write to or boot from a removable media drive (such as the diskette drive) may be enabled through the Setup utility.
Technical Reference Guide 4.7.3 SYSTEM STATUS These systems provide a visual indication of system boot and ROM flash status through the keyboard LEDs as listed in table 4-12. NOTE: The LED indications listed in Table 4-12 are valid only for PS/2-type keyboards. A USB keyboard will not provide LED status for the listed events, although audible (beep) indications will occur. Table 4-12. System Boot/ROM Flash Status LED Indications Table 4-12.
Chapter 4 System Support 4.7.4 TEMPERATURE SENSING AND COOLING These systems feature a fan integrated into the power supply assembly. A separate chassis fan is also employed. Both fans are variable-speed type, and typically operate in tandem as long as the power supply is active (producing 12 VDC). The fans are off in S3 (Suspend-to-RAM) and S5 (Soft-Off) states. NOTE: These systems are designed to provide optimum cooling with the cover in place.
Technical Reference Guide 4.8 REGISTER MAP AND MISCELLANEOUS FUNCTIONS This section contains the system I/O map and information on general-purpose functions of the ICH and I/O controller. 4.8.1 SYSTEM I/O MAP Table 4-14 lists the fixed addresses of the input/output (I/O) ports. Table 4-14. System I/O Map Table 4-14. System I/O Map I/O Port Function 0000..001Fh DMA Controller 1 0020..002Dh Interrupt Controller 1 002E, 002Fh Index, Data Ports to LPC47B357 I/O Controller (primary) 0030..
Chapter 4 System Support 4.8.2 82801 ICH GENERAL PURPOSE FUNCTIONS The 82801 ICH2 component includes a number of single and multi-purpose pins available as general-purpose input/output (GPIO) ports. The GPIO ports are configured (enabled/disabled) during POST by BIOS through the PCI configuration registers of the ICH’s LPC I/F Bridge (82801, function 0). The GPIO ports are controlled through 64 bytes of I/O space that is mapped during POST.
Technical Reference Guide 4.8.3 I/O CONTROLLER FUNCTIONS The I/O controller (used in desktop and minitower systems) contains various functions such as the keyboard/mouse interfaces, diskette interface, serial interfaces, and parallel interface. While the control of these interfaces uses standard AT-type I/O addressing (as described in chapter 5) the configuration of these functions occurs through indexed ports using PnP protocol.
Chapter 4 System Support 4.8.3.1 LPC47B357 GPIO Utilization The LPC47B357 I/O Controller (used in desktop and minitower systems) provides 62 generalpurpose pins that can be individually configured for specific purposes. These pins are configured through the Runtime registers (logical device 0Ah) during the system’s configuration phase of the boot sequence by the BIOS. Table 4-17 lists the GPIO registers for the LPC47B357.
Technical Reference Guide 4.8.3.
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Technical Reference Guide Chapter 5 INPUT/OUTPUT INTERFACES 5. Chapter 5 INPUT/OUTPUT INTERFACES 5.1 INTRODUCTION This chapter describes the standard (i.e., system board) interfaces that provide input and output (I/O) porting of data and specifically discusses interfaces that are controlled through I/O-mapped registers. The following I/O interfaces are covered in this chapter: ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ 5.2 Enhanced IDE interface (5.2) Diskette drive interface (5.3) Serial interfaces (5.4) Parallel interface (5.
Chapter 5 Input/Output Interfaces Hard drives types not found in the ROM’s parameter table are automatically configured as to (soft)type by DOS as follows: Primary controller: drive 0, type 65; drive 1, type 66 Secondary controller: drive 0, type 68; drive 1, type 15 Non-DOS (non-Windows) operating systems may require using Setup (F10) for drive configuration. 5.2.1.1 IDE Configuration Registers The IDE controller is configured as a PCI device with bus mastering capability.
Technical Reference Guide 5.2.2 IDE CONNECTOR This system uses a standard 40-pin connector for the primary IDE device and connects (via a cable) to the hard drive installed in the right side drive bay. Note that some signals are re-defined for UATA/33 and UATA/66 modes, which require a special 80-conductor cable (supplied) designed to reduce cross-talk. Device power is supplied through a separate connector. Figure 5-1. 40-Pin Primary IDE Connector (on system board). Table 5–3.
Chapter 5 Input/Output Interfaces 5.3 DISKETTE DRIVE INTERFACE The diskette drive interface supports up to two diskette drives, each of which use a common cable connected to a standard 34-pin diskette drive connector. All models come standard with a 3.5-inch 1.44-MB diskette drive installed as drive A. The drive designation is determined by which connector is used on the diskette drive cable.
Technical Reference Guide 5.3.1 DISKETTE DRIVE PROGRAMMING Programming the diskette drive interface consists of configuration, which occurs typically during POST, and control, which occurs at runtime. 5.3.1.1 Diskette Drive Interface Configuration The diskette drive controller must be configured for a specific address and also must be enabled before it can be used.
Chapter 5 Input/Output Interfaces Table 5-5. Diskette Drive Interface Control Registers Pri. Addr. 3F0h Sec. Addr.
Technical Reference Guide 5.3.2 DISKETTE DRIVE CONNECTOR This system uses a standard 34-pin connector (refer to Figure 5-2 and Table 5-6 for the pinout) for diskette drives. Drive power is supplied through a separate connector. 2 1 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 Figure 5-2. 34-Pin Diskette Drive Connector. Table 5–6. 34-Pin Diskette Drive Connector Pinout Table 5-6.
Chapter 5 Input/Output Interfaces 5.4 SERIAL INTERFACE All models include two serial interfaces to transmit and receive asynchronous serial data with external devices. The serial interface function is provided by the LPC47B357 I/O controller component that includes two NS16C550-compatible UARTs. Each UART supports the standard baud rates up through 115200, and also special high speed rates of 239400 and 460800 baud.
Technical Reference Guide 5.4.2 SERIAL INTERFACE PROGRAMMING Programming the serial interfaces consists of configuration, which occurs during POST, and control, which occurs during runtime. 5.4.2.1 Serial Interface Configuration The serial interface must be configured for a specific address range (COM1, COM2, etc.) and also must be activated before it can be used. Address selection and activation of the serial interface are affected through the PnP configuration registers of the LPC47B357 I/O controller.
Chapter 5 Input/Output Interfaces 5.4.2.2 Serial Interface Control The BIOS function INT 14 provides basic control of the serial interface. The serial interface can be directly controlled by software through the I/O-mapped registers listed in Table 5-9. Table 5–9. Serial Interface Control Registers Table 5-9. Serial Interface Control Registers COM1 Addr. 3F8h COM2 Addr.
Technical Reference Guide 5.5 PARALLEL INTERFACE The legacy-light models include a parallel interface for connection to a peripheral device that has a compatible interface, the most common being a printer. The parallel interface function is integrated into the LPC47B357 I/O controller component and provides bi-directional 8-bit parallel data transfers with a peripheral device.
Chapter 5 Input/Output Interfaces 5.5.2 ENHANCED PARALLEL PORT MODE In Enhanced Parallel Port (EPP) mode, increased data transfers are possible (up to 2 MB/s) due to a hardware protocol that provides automatic address and strobe generation. EPP revisions 1.7 and 1.9 are both supported. For the parallel interface to be initialized for EPP mode, a negotiation phase is entered to detect whether or not the connected peripheral is compatible with EPP mode. If compatible, then EPP mode can be used.
Technical Reference Guide 5.5.4 PARALLEL INTERFACE PROGRAMMING Programming the parallel interface consists of configuration, which typically occurs during POST, and control, which occurs during runtime. 5.5.4.1 Parallel Interface Configuration The parallel interface must be configured for a specific address range (LPT1, LPT2, etc.) and also must be enabled before it can be used. When configured for EPP or ECP mode, additional considerations must be taken into account.
Chapter 5 Input/Output Interfaces 5.5.4.2 Parallel Interface Control The BIOS function INT 17 provides simplified control of the parallel interface. Basic functions such as initialization, character printing, and printer status are provide by subfunctions of INT 17. The parallel interface is controllable by software through a set of I/O mapped registers. The number and type of registers available depends on the mode used (SPP, EPP, or ECP).
Technical Reference Guide 5.5.5 PARALLEL INTERFACE CONNECTOR Figure 5-4 and Table 5-12 show the connector and pinout of the parallel interface connector. Note that some signals are redefined depending on the port’s operational mode. 13 12 25 11 24 10 23 9 22 8 21 7 20 6 19 4 5 18 17 3 16 2 15 1 14 Figure 5-4. Parallel Interface Connector (Female DB-25 as viewed from rear of chassis) Table 5–12. DB-25 Parallel Connector Pinout Table 5-12.
Chapter 5 Input/Output Interfaces 5.6 KEYBOARD/POINTING DEVICE INTERFACE The keyboard/pointing device interface function is provided by the LPC47B357 I/O controller component, which integrates 8042-compatible keyboard controller logic (hereafter referred to as simply the “8042”) to communicate with the keyboard and pointing device using bi-directional serial data transfers.
Technical Reference Guide Control of the data and clock signals is shared by the 8042and the keyboard depending on the originator of the transferred data. Note that the clock signal is always generated by the keyboard. After the keyboard receives a command from the 8042, the keyboard returns an ACK code. If a parity error or timeout occurs, a Resend command is sent to the 8042. Table 5-13 lists and describes commands that can be issued by the 8042 to the keyboard. Table 5–13.
Chapter 5 Input/Output Interfaces 5.6.2 POINTING DEVICE INTERFACE OPERATION The pointing device (typically a mouse) connects to a 6-pin DIN-type connector that is identical to the keyboard connector both physically and electrically. The operation of the interface (clock and data signal control) is the same as for the keyboard. The pointing device interface uses the IRQ12 interrupt. 5.6.
Technical Reference Guide 5.6.3.2 8042 Control The BIOS function INT 16 is typically used for controlling interaction with the keyboard. Subfunctions of INT 16 conduct the basic routines of handling keyboard data (i.e., translating the keyboard’s scan codes into ASCII codes).
Chapter 5 Input/Output Interfaces Table 5-15 lists the commands that can be sent to the 8042 by the CPU. The 8042 uses IRQ1 for gaining the attention of the CPU. Table 5–15. CPU Commands To The 8042 Table 5-15. CPU Commands To The 8042 Value 20h 60h A4h A5h A6h A7h A8h A9h AAh ABh ADh AEh C0h C2h C3h D0h D1h D2h D3h D4h E0h F0hFFh Command Description Put current command byte in port 60h. Load new command byte. Test password installed.
Technical Reference Guide 5.6.4 KEYBOARD/POINTING DEVICE INTERFACE CONNECTOR The legacy-light model provides separate PS/2 connectors for the keyboard and pointing device. Both connectors are identical both physically and electrically. Figure 5-6 and Table 5-16 show the connector and pinout of the keyboard/pointing device interface connectors. 6 5 4 3 2 1 Figure 5-5. Keyboard or Pointing Device Interface Connector (PS/2 female as viewed from rear of chassis) Table 5–16.
Chapter 5 Input/Output Interfaces 5.7 UNIVERSAL SERIAL BUS INTERFACE The Universal Serial Bus (USB) interface provides asynchronous/isochronous data transfers of up to 12 Mb/s with compatible peripherals such as keyboards, printers, or modems. This high-speed interface supports hot-plugging of compatible devices, making possible system configuration changes without powering down or even rebooting systems.
Technical Reference Guide The USB transmissions consist of packets using one of four types of formats (Figure 5-8) that include two or more of seven field types. ♦ Sync Field – 8-bit field that starts every packet and is used by the receiver to align the incoming signal with the local clock. ♦ Packet Identifier (PID) Field – 8-bit field sent with every packet to identify the attributes (in.
Chapter 5 Input/Output Interfaces 5.7.2 USB PROGRAMMING Programming the USB interface consists of configuration, which typically occurs during POST, and control, which occurs at runtime. 5.7.2.1 USB Configuration The USB interface operates as a PCI device (31) within the 82801 ICH2 component (functions 2 and 4) and is configured using PCI Configuration Registers as listed in Table 5-17. Table 5–17. USB Interface Configuration Registers Table 5-17. USB Interface Configuration Registers PCI Config. Addr.
Technical Reference Guide 5.7.3 USB CONNECTOR Four series-A connectors are accessible on the rear panel of the chassis. 1 2 3 4 Figure 5-8. Universal Serial Bus Connector Table 5–19. USB Connector Pinout Table 5-19. USB Connector Pinout Pin 1 2 Signal Vcc USB- Description +5 VDC Data (minus) Pin 3 4 Signal USB+ GND Description Data (plus) Ground 5.7.
Chapter 5 Input/Output Interfaces 5.8 AUDIO SUBSYSTEM The systems covered in this guide come standard with an embedded Sound Blaster 128 audio subsystem. 5.8.1 FUNCTIONAL ANALYSIS A block diagram of the audio subsystem is shown in Figure 5-10. The Ensonic ES1373 Audio Controller, operating off the PCI bus, accesses and controls a Cirrus Logic CS4297A Audio Codec. The codec provides the analog-to-digital (ADC) and digital-to-analog (DAC) conversions as well as the mixing functions.
Technical Reference Guide PCI Bus PC Beep Audio ES1373 Audio Controller ICH2 SPDIF Out AC97 Link Bus Int. Speaker Header P6 (L) Mic In Audio Bias Line In (L) (R) CD ROM Header P7 1 2 3 4 Aux. Header P11 1 2 3 4 CD Audio (L) CD Audio (R) (R) CS4297A Audio Codec Line Out Audio (L/R) TDA 7056 Σ L/R Audio 1 2 (L) (R) Internal Speaker + - Headphones/ SPDIF/ Line Out Aux Audio (L) Aux Audio (R) Figure 5-9.
Chapter 5 Input/Output Interfaces 5.8.2 AUDIO CONTROLLER The Creative Technology, Ltd.
Technical Reference Guide 5.8.3 AC97 LINK BUS The audio controller and the audio codec communicate over a five-signal AC97 Link Bus (Figure 5-12). The AC97 Link Bus includes two serial data lines (SD OUT/SD IN) that transfer control and PCM audio data serially to and from the audio codec using a time-division multiplexed (TDM) protocol. The data lines are qualified by a 12.288 MHz BIT_CLK signal driven by the audio codec.
Chapter 5 Input/Output Interfaces 5.8.4 AUDIO CODEC The Cirrus Logic CS4297A audio codec provides pulse code modulation (PCM) coding and decoding of audio information as well as the selection and/or mixing of analog channels. As shown in Figure 5-11, analog audio from a microphone, tape, or CD can be selected and, if to be recorded (saved) onto a disk drive, routed through an analog-to-digital converter (ADC).
Technical Reference Guide 5.8.5 AUDIO PROGRAMMING Audio subsystem programming consists configuration, typically accomplished during POST, and control, which occurs during runtime. 5.8.5.1 Audio Configuration The audio subsystem is configured according to PCI protocol through the ES1373 audio controller. Table 5-21 lists the PCI configuration registers of the audio subsystem. Table 5–21. AC’97 Audio Controller PCI Configuration Registers Table 5-21.
Chapter 5 Input/Output Interfaces 5.8.6 AUDIO SPECIFICATIONS The specifications for the audio subsystem are listed in Table 5-23. Table 5–23. Audio Subsystem Specifications Table 5-23. Audio Subsystem Specifications Paramemter Sampling Rate Resolution Nominal Input Voltage: Mic In (w/+20 db gain) Line In Impedance: Mic In Line In Line Out (codec output) Signal-to-Noise Ratio (input to Line Out) Max.
Technical Reference Guide 5.9 NETWORK SUPPORT These systems include specific features to support network interface PCI cards that may be installed. These features, including network-alert functions with system-off support, are described in the following subsections. 5.9.1 PCI VER. 2.2 SUPPORT These systems support the Power Management Event (PME-) signal and provided 3.3 VDC auxiliary power for all PCI slots. Network interface cards compliant with PCI specification ver. 2.
Chapter 5 Input/Output Interfaces As shown in the following figure, support with an AOL-compliant NIC PCI card (such as the Intel PRO/100+ Management Adapter Solution) requires no auxiliary cable since the communication of alert events is handled through the PCI bus interface. NIC Card in PCI Slot Network Cable System Board Alert Clock Trace Alert Data Trace 82801 ICH2 Figure 5-12.
Technical Reference Guide 5.9.3 REMOTE SYSTEM ALERT SUPPORT These systems provide Remote System Alert (RSA) support for such NIC cards as the 3Com 3C905C-TX NIC card. The RSA function is similar to AOL in that the unit provides, even while powered off, system status alert messages to a network console.
Chapter 5 Input/Output Interfaces Reportable RSA events are listed in the following table: Table 5–25. Remote System Alert Events Table 5-25. Remote System Alert Events Event BIOS Failure Thermal Condition Heartbeat Description System fails to boot successfully. CPU Thermal shutdown reported. Indication of system’s network presence (sent approximately every 30 seconds in normal operation). The current Remote System Alert implementation requirements are as follows: 1. 2. 3. 4. 5. 6.
Technical Reference Guide Chapter 6 POWER and SIGNAL DISTRIBUTION 6. Chapter 6 POWER SUPPLY AND DISTRIBUTION 6.1 INTRODUCTION This chapter describes the power supply and method of general power and signal distribution. Topics covered in this chapter include: ♦ ♦ ♦ 6.2 Power supply assembly/control (6.2) Power distribution (6.3) Signal distribution (6.
Chapter 6 Power and Signal Distribution 6.2.1 POWER SUPPLY ASSEMBLY The power supply assembly is contained in a single unit that features a selectable input voltage: 90-132 VAC and 180-264 VAC. Deskpro EN SFF systems use a 120-watt supply while all other systems employ a 265-watt supply. Table 6-1 list the specifications of the power supplies. Table 6–1. 265-Watt Power Supply Assembly Specifications Table 6-1. 265-Watt Power Supply Assembly Specifications (P/N 195196) Range/ Tolerance Min.
Technical Reference Guide 6.2.2 POWER CONTROL The power supply assembly is controlled digitally by the PS On signal (Figure 7-1). When PS On is asserted, the Power Supply Assembly is activated and all voltage outputs are produced. When PS On is de-asserted, the Power Supply Assembly is off and all voltages (except +3.3 AUX and +5 AUX) are not generated. Note that the +3.3 AUX and +5 AUX voltages are always produced as long as the system is connected to a live AC source. 6.2.2.
Chapter 6 Power and Signal Distribution 6.2.2.3 Power LED Indications A dual-color LED located on the front panel (bezel) is used to indicate system power status. The front panel (bezel) power LED provides a visual indication of key system conditions listed as follows: Power LED Steady green Blinks green @ 1 Hz Blinks green @ 2 Hz Blinks green @ 4 Hz Steady red Blinks red @ 0.
Technical Reference Guide 6.3 POWER DISTRIBUTION 6.3.1 3.3/5/12 VDC DISTRIBUTION The power supply assembly includes a multi-connector cable assembly that routes +3.3 VDC, +5 VDC, -5 VDC, +12 VC, and -12 VDC to the system board as well as to the individual drive assemblies. Figure 6-2 shows the power supply cabling for Deskpro EXS and Workstation 300 series units.
Chapter 6 Power and Signal Distribution 6.3.2 LOW VOLTAGE PRODUCTION/DISTRIBUTION Voltages less than 3.3 VDC including processor core (VccP) voltage are produced through regulator circuitry on the system board. +5 AUX +5 VDC +3.3 VDC +12 VDC Power Supply +3.3 VDC +3 AUX 3.3 RIMM Circuit 3.3 VDC AGP PWR VDDQ (1.5 VDC) RIMMs AGP Bus 2.5 S3 VDC RIMM Power Circuitry +1.8 VDC RIMMs +1.4 Ref +5 VDC +12 VDC +12.
Technical Reference Guide 6.4 SIGNAL DISTRIBUTION Figures 6-4 shows general signal distribution between the main subassemblies of the system units. Chassis Fan Graphics Controller Audio AGP Bus AGP Connector Fan PWR Conn. P8 Power On/Off Power On Conn. P6 Conn. P5 [1] Pwr Btn, Pwr/HD LED Conn. P3 12.8 Vcpu 3/5/12 VDC, 3/5AUX Conn. P1 System Board Fan Cntrl., PS On HD Activity Power Supply Assembly IDE Data, Cntl Pri. IDE Conn. P20 IDE Hard Drive (PCA # 010821) Sec. IDE Conn.
Chapter 6 Power and Signal Distribution Power Button/LED Header P5 1 HD LED anode 3 HD LED cathode 4 PWR LED anode 5 PWR LED cathode 6 PWR button (gnd) 7 PWR button (+) 8 Reserved 9 GND 10 SCSI HD LED [1] 11 SCSI HD LED [1] CD ROM Audio Header P7 1 2 3 4 Audio (Left Channel) Ground Ground Audio (right channel) AOL/SOS Header P12 BIOS Fail Not Connected Not Connected Ground 1 3 5 7 2 Not Connected 4 Not Connected 6 Thermal NOTE: No polarity consideration required for connection to speaker header P6 or
Technical Reference Guide Chapter 7 BIOS ROM 7. Chapter 7 BIOS ROM 7.1 INTRODUCTION The Basic Input/Output System (BIOS) of the computer is a collection of machine language programs stored as firmware in read-only memory (ROM). The BIOS ROM includes such functions as Power-On Self Test (POST), PCI device initialization, Plug ‘n Play support, power management activities, and the Setup utility.
Chapter 7 BIOS ROM 7.2 ROM FLASHING The system BIOS firmware is contained in a flash ROM device that can be re-written with BIOS code (using the ROMPAQ utility or a remote flash program) allowing easy upgrading, including changing the splash screen displayed during the POST routine. 7.2.1 UPGRADING Upgrading the BIOS is not normally required but may be necessary if changes are made to the unit’s operating system, hard drive, or processor. All BIOS ROM upgrades are available directly from Compaq.
Technical Reference Guide 7.2.2 CHANGEABLE SPLASH SCREEN The splash screen (image displayed during POST) is stored in the BIOS ROM and may be replaced with another image of choice by using the Image Flash utility (Flashi.exe). The Image Flash utility allows the user to browse directories for image searching and pre-viewing. Background and foreground colors can be chosen from the selected image’s palette.
Chapter 7 BIOS ROM 7.3 BOOT FUNCTIONS The BIOS supports various functions related to the boot process, including those that occur during the Power On Self-Test (POST) routine. 7.3.1 BOOT DEVICE ORDER The default boot device order is as follows: 1. 2. 3. 4. CD-ROM drive (EL Torito CD images) Diskette drive (A) Hard drive (C) Network boot The order can be changed in the ROM-based Setup utility (accessed by pressing F10 when so prompted during POST). 7.3.
Technical Reference Guide 7.3.3 MEMORY DETECTION AND CONFIGURATION This system uses the Serial Presence Detect (SPD) method of determining the installed RIMM configuration. The BIOS communicates with an EEPROM on each RIMM through the SMBus to obtain data on the following RIMM parameters: ♦ ♦ ♦ ♦ Presence Size Type PC800 capability NOTE: Refer to Chapter 3, “Processor/Memory Subsystem” for the SPD format and RIMM data specific to this system.
Chapter 7 BIOS ROM 7.4 SETUP UTILITY The Setup utility (stored in ROM) allows the user to configure system functions involving security, power management, and system resources. The Setup utility is ROM-based and invoked when the F10 key is pressed during the time the F10 prompt is displayed in the lower right-hand corner of the screen during the POST routine. Highlights of the Setup utility are described in the following table.
Technical Reference Guide Table 7-3. Setup Utility Functions Continued Heading Option Description Storage (continued) Device Configuration (continued) Translation Mode (IDE disks only) Lets you select the translation mode to be used for the device. This enables the BIOS to access disks partitioned and formatted on other systems and may be necessary for users of older versions of Unix (e.g., SCO Unix version 3.2). Options are Bit-Shift, LBA Assisted, User, and None.
Chapter 7 BIOS ROM Table 7-3. Setup Utility Functions Continued Heading Storage (continued) Option DPS Self-Test Boot Order Security Setup Password Power-On Password Password Options Smart Cover Description Allows user to execute self-tests on IDE hard drives capable of performing the Drive Protection System (DPS) self-tests.
Technical Reference Guide Table 7-3. Setup Utility Functions Continued Heading Security (continued) Option Master Boot Record Security Save Master Boot Record Restore Master Boot Record Description Allows user to enable or disable Master Boot Record (MBR) Security. When enabled, the BIOS rejects all requests to write to the MBR on the current bootable disk. Each time the computer is powered on or rebooted, the BIOS compares the MBR of the current bootable disk to the previouslysaved MBR.
Chapter 7 BIOS ROM Table 7-3. Setup Utility Functions Continued Heading Power Option Energy Saver Timeouts Energy Saver Options Advanced (Advanced users only) Power-On Options Onboard Devices PCI Devices Description Allows user to set the energy saver mode (advanced, disable, or minimal). Note: In the minimal energy saver mode setting, the hard drive and system do not go into energy saver mode, but the setting allows you to press the power button to suspend the system.
Technical Reference Guide Table 7-3. Setup Utility Functions Continued Heading Advanced (continued) Option Bus Options Device Options PCI VGA Configuration Description Allows user to enable or disable: PCI bus mastering, which allows a PCI device to take control of the PCI bus PCI VGA palette snooping, which sets the VGA palette snooping bit in PCI configuration space; this is only needed with more than one graphics controller installed PCI SERR# Generation.
Chapter 7 BIOS ROM 7.5 CLIENT MANAGEMENT FUNCTIONS Table 7-4 lists the client management BIOS functions supported by the systems covered in this guide. These functions, designed to support intelligent manageability applications, are Compaqspecific unless otherwise indicated. Table 7-4. Client Management Functions (INT15) Table 7-4.
Technical Reference Guide To support Windows NT an additional table to the BIOS32 table has been defined to contain 32bit pointers for the DDC locations. The Windows NT extension table is as follows: ; Extension to BIOS SERVICE directory table (next paragraph) db db db dd dw db dd dw “32OS” 2 “$DDC” ? ? “$ERB” ? ? ; sig ; number of entries in table ; DDC POST buffer sig ; 32-bit pointer ; byte size ; ESCD sig ; 32-bit pointer ; bytes size The service identifier for client management functions is “$CLM.
Chapter 7 BIOS ROM 7.5.1 SYSTEM ID AND ROM TYPE Applications can use the INT 15, AX=E800h BIOS function to identify the type of system. This function will return the system ID in the BX register. These systems have the following IDs and ROM family types: System Deskpro EXS or Workstation 300 System ID 06C8h ROM Family 686P5 PnP ID CPQ0010 The ROM family and version numbers can be verified with the Setup utility or the Compaq Insight Manager or Diagnostics applications. 7.5.
Technical Reference Guide 7.5.4 DRIVE FAULT PREDICTION The Compaq BIOS directly supports Drive Fault Prediction for IDE-type hard drives. This feature is provided through two Client Management BIOS calls. Function INT 15, AX=E817h is used to retrieve a 512-byte block of drive attribute data while the INT 15, AX=E81Bh is used to retrieve the drive’s warranty threshold data.
Chapter 7 BIOS ROM 7.6.1 SMBIOS In support of the DMI specification the PnP functions 50h and 51h are used to retrieve the SMBIOS data. Function 50h retrieves the number of structures, size of the largest structure, and SMBIOS version. Function 51h retrieves a specific structure. This system supports SMBIOS version 2.3.
Technical Reference Guide 7.7 POWER MANAGEMENT FUNCTIONS The BIOS ROM provides three types of power management support: independent PM support; APM support, and ACPI support. 7.7.1 INDEPENDENT PM SUPPORT The BIOS can provide power management (PM) of the system independently from an operating system that doesn’t support APM (including DOS, Unix, NT & older versions of OS/2). In the Independent PM environment the BIOS and hardware timers determine when to switch the system to a different power state.
Chapter 7 BIOS ROM 7.7.1.2 Going to Sleep in Independent PM When a time-out timer expires, Standby for that timer occurs. System Standby When the system acquires the Standby mode the BIOS performs two duties: 1. Blanks the screen. 2. Turns off Vsync (to reduce CRT heater voltage). Since the hard drive inactivity timer is in the drive and triggered by drive access, the system can be in Standby with the hard drives still spinning (awake).
Technical Reference Guide 7.7.2 ACPI SUPPORT This system meets the hardware and firmware requirements for being ACPI compliant. This system supports the following ACPI functions: ♦ ♦ ♦ ♦ ♦ ♦ ♦ PM timer Power button Power button override RTC alarm Sleep/Wake logic (S1,S3, S4 (Windows 2000), S5) C1 state (Halt) PCI Power Management Event (PME) 7.7.3 APM 1.2 SUPPORT Advanced Power Management (APM) is an extension of power management.
Chapter 7 BIOS ROM Table 7-6. APM BIOS Functions Table 7-6.
Technical Reference Guide 7.7.3.1 Staying Awake in APM There are two "Time-out to Standby" timers used in APM: the System Timer and the IDE had Drive Timer. System Timer In POST, the ROM enables a timer in the ICH2 that generates an SMI once per minute.
Chapter 7 BIOS ROM 7.7.3.2 Going to Sleep in APM There are three levels of system sleep in APM: System/Hard Drive Standby, System Suspend, and System Off. System/Hard Drive Standby System Standby is achieved only by a system timer time-out, at such time the following occurs: 1. 2. All APM-aware device drivers put their respective devices into “Device Standby.” The O/S makes a BIOS call to go into System Standby. NOTE: The BIOS ROM of these systems will not turn the fan(s) off as on previous systems).
Technical Reference Guide System OFF There are two ways to turn the system off: 1. 2. Press and hold the power button for longer than 4 seconds (not recommended unless absolutely necessary). Software shut-down as directed by the O/S. This, being the normal procedure, allows a NIC driver to re-arm the NIC for a Magic Packet™. 7.7.3.
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Technical Reference Guide Appendix A ERROR MESSAGES AND CODES A. Appendix A ERROR MESSAGES AND CODES A.1 INTRODUCTION This appendix lists the error codes and a brief description of the probable cause of the error. NOTE: Errors listed in this appendix are applicable only for systems running Compaq BIOS. NOTE: Not all errors listed in this appendix may be applicable to a particular system model and/or configuration. A.2 BEEP/KEYBOARD LED CODES Table A–1. Beep/Keyboard LED Codes Table A-1.
Appendix A Error Messages and Codes A.3 POWER-ON SELF TEST (POST) MESSAGES Table A–2. Power-On Self Test (POST) Messages Table A-2.
Technical Reference Guide A.4 SYSTEM ERROR MESSAGES (1xx-xx) Table A–3. System Error Messages Table A-3. System Error Messages Message 101 102 103 104-01 104-02 104-03 105-01 105-02 105-03 105-04 105-05 105-06 105-07 105-08 105-09 105-10 105-11 105-12 105-13 105-14 Probable Cause Option ROM error System board failure (see note) System board failure Master int. cntlr. test fialed Slave int. cntlr. test failed Int. cntlr.
Appendix A Error Messages and Codes A.5 MEMORY ERROR MESSAGES (2xx-xx) Table A–4. Memory Error Messages Table A-4. Memory Error Messages Message 200-04 200-05 200-06 200-07 200-08 201-01 202-01 202-02 202-03 203-01 203-02 203-03 204-01 204-02 204-03 204-04 204-05 205-01 205-02 205-03 206-xx 207-xx 210-01 210-02 210-03 211-01 211-02 211-03 213-xx 214-xx 215-xx A.
Technical Reference Guide A.7 PRINTER ERROR MESSAGES (4xx-xx) Table A–6. Printer Error Messages Table A-6. Printer Error Messages A.8 Message 401-01 402-01 402-02 402-03 402-04 Probable Cause Printer failed or not connected Printer data register failed Printer control register failed Data and control registers failed Loopback test failed Message 402-11 402-12 402-13 402-14 402-15 402-05 402-06 402-07 402-08 402-09 402-10 Loopback test and data reg. failed Loopback test and cntrl. reg.
Appendix A Error Messages and Codes A.9 DISKETTE DRIVE ERROR MESSAGES (6xx-xx) Table A–8. Diskette Drive Error Messages Table A-8.
Technical Reference Guide A.11 MODEM COMMUNICATIONS ERROR MESSAGES (12xx-xx) Table A–10. Serial Interface Error Messages Table A-10.
Appendix A Error Messages and Codes A.12 SYSTEM STATUS ERROR MESSAGES (16xx-xx) Table A–11. System Status Error Messages Table A-11. System Status Error Messages Message 1601-xx 1611-xx Probable Cause Temperature violation Fan failure A.13 HARD DRIVE ERROR MESSAGES (17xx-xx) Table A–12. Hard Drive Error Messages Table A-12. Hard Drive Error Messages Message Probable Cause Message Probable Cause 17xx-01 Exceeded max. soft error limit 17xx-51 Failed I/O read test 17xx-02 Exceeded max.
Technical Reference Guide A.14 HARD DRIVE ERROR MESSAGES (19xx-xx) Table A–13. Hard Drive Error Messages Table A-13.
Appendix A Error Messages and Codes A.16 AUDIO ERROR MESSAGES (3206-xx) Table A–15. Audio Error Messages Table A-15. Audio Error Message Message 3206-xx Probable Cause Audio subsystem internal error A.17 DVD/CD-ROM ERROR MESSAGES (33xx-xx) Table A–16. DVD/CD-ROM Drive Error Messages Table A-16. DVD/CD-ROM Drive Error Messages Message Probable Cause 3301-xx Drive test failed 3305-XX Seek test failed See Table A-18 for additional messages. A.18 NETWORK INTERFACE ERROR MESSAGES (60xx-xx) Table A–17.
Technical Reference Guide A.19 SCSI INTERFACE ERROR MESSAGES (65xx-xx, 66xx-xx, 67xx-xx) Table A–18. SCSI Interface Error Messages Table A-18.
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Technical Reference Guide Appendix B ASCII CHARACTER SET B. Appendix B ASCII CHARACTER SET B.1 INTRODUCTION This appendix lists, in Table B-1, the 256-character ASCII code set including the decimal and hexadecimal values. All ASCII symbols may be called while in DOS or using standard text-mode editors by using the combination keystroke of holding the Alt key and using the Numeric Keypad to enter the decimal value of the symbol.
Appendix B ASCII Character Set Dec 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 NOTES: Hex 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F Symbol Ç ü é â ä à å ç ê ë è ï î ì Ä Å É æ Æ ô ö ò û ù ÿ Ö Ü ¢ £ ¥ ₧ ƒ Dec 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 Hex A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
Technical Reference Guide Appendix C KEYBOARD C. Appendix C KEYBOARD C.1 INTRODUCTION This appendix describes the Compaq keyboard that is included as standard with the system unit. The keyboard complies with the industry-standard classification of an “enhanced keyboard” and includes a separate cursor control key cluster, twelve “function” keys, and enhanced programmability for additional functions. This appendix covers the following keyboard types: ♦ Standard enhanced keyboard.
Appendix C Keyboard C.2 KEYSTROKE PROCESSING A functional block diagram of the keystroke processing elements is shown in Figure C-1. Power (+5 VDC) is obtained from the system through the PS/2-type interface. The keyboard uses a Z86C14 (or equivalent) microprocessor. The Z86C14 scans the key matrix drivers every 10 ms for pressed keys while at the same time monitoring communications with the keyboard interface of the system unit. When a key is pressed, a Make code is generated.
Technical Reference Guide C.2.1 PS/2-TYPE KEYBOARD TRANSMISSIONS The PS/2-type keyboard sends two main types of data to the system; commands (or responses to system commands) and keystroke scan codes. Before the keyboard sends data to the system (specifically, to the 8042-type logic within the system), the keyboard verifies the clock and data lines to the system. If the clock signal is low (0), the keyboard recognizes the inhibited state and loads the data into a buffer.
Appendix C Keyboard C.2.2 USB-TYPE KEYBOARD TRANSMISSIONS The USB-type keyboard sends essentially the same information to the system that the PS/2 keyboard does except that the data receives additional NRZI encoding and formatting (prior to leaving the keyboard) to comply with the USB I/F specification (discussed in chapter 5 of this guide). Packets received at the system’s USB I/F and decoded as originating from the keyboard result in an SMI being generated.
Technical Reference Guide C.2.3 KEYBOARD LAYOUTS Figures C-3 through C-8 show the key layouts for keyboards shipped with Compaq systems. Actual styling details including location of the Compaq logo as well as the numbers lock, caps lock, and scroll lock LEDs may vary. C.2.3.
Appendix C Keyboard C.2.3.2 Windows Enhanced Keyboards 1 18 17 2 3 4 5 19 20 21 22 41 40 39 59 75 92 61 60 45 44 93 110 47 46 27 68 83 82 10 11 28 29 50 48 49 67 66 81 80 9 26 25 65 64 79 78 24 23 63 62 77 76 43 42 8 7 6 94 95 13 31 30 51 70 69 84 12 14 15 16 32 33 34 35 36 37 52 53 54 55 56 57 72 73 74 88 89 90 71 87 86 85 96 111 112 97 98 99 100 38 58 91 101 Figure C–5. U.S.
Technical Reference Guide C.2.3.3 Easy Access Keyboards The Easy Access keyboard is a Windows Enhanced-type keyboard that includes special buttons allowing quick internet navigation. Depending on system, either a 7-button or an 8-button layout may be supplied. The 7-button Easy Access Keyboard uses the layout shown in Figure C-7 and is available with either a legacy PS/2-type connection or a Universal Serial Bus (USB) type connection.
Appendix C Keyboard C.2.4 KEYS All keys generate a make code (when pressed) and a break code (when released) with the exception of the Pause key (pos. 16), which produces a make code only. All keys with the exception of the Pause and Easy Access keys are also typematic, although the typematic action of the Shift, Ctrl, Alt, Num Lock, Scroll Lock, Caps Lock, and Ins keys is suppressed by the BIOS.
Technical Reference Guide C.2.4.2 Multi-Keystroke Functions Shift - The Shift key (pos. 75/86), when held down, produces a shift state (upper case) for keys in positions 17-29, 30, 39-51, 60-70, and 76-85 as long as the Caps Lock key (pos. 59) is toggled off. If the Caps Lock key is toggled on, then a held Shift key produces the lower (normal) case for the identified pressed keys. The Shift key also reverses the Num Lock state of key positions 55-57, 72, 74, 88-90, 100, and 101.
Appendix C Keyboard C.2.4.4 Easy Access Keystrokes The Easy Access keyboards (Figures C-7 and C-8) include additional keys (also referred to as buttons) used to streamline internet access and navigation.
Technical Reference Guide C.2.5 KEYBOARD COMMANDS Table C-1 lists the commands that the keyboard can send to the system (specifically, to the 8042type logic). Table C–1. Keyboard-to-System Commands Table C-1. Keyboard-to-System Commands Command Key Detection Error/Over/run BAT Completion BAT Failure Echo Acknowledge (ACK) Resend Keyboard ID Value 00h [1] FFh [2] AAh FCh EEh FAh FEh 83ABh Description Indicates to the system that a switch closure couldn’t be identified.
Appendix C Keyboard Table C–2. Keyboard Scan Codes Table C-2. Keyboard Scan Codes Key Pos.
Technical Reference Guide Table C-2.
Appendix C Keyboard Table C-2. Keyboard Scan Codes (Continued) Key Pos. 81 82 83 84 85 86 87 Legend N M , . / Shift (right) 88 89 90 91 1 2 3 Enter 92 93 94 95 96 97 Ctrl (left) Alt (left) (Space) Alt (right) Ctrl (right) 98 99 100 101 102 103 104 110 0 .
Technical Reference Guide Table C-2. Keyboard Scan Codes (Continued) Key Pos.
Appendix C Keyboard C.3 CONNECTORS Two types of keyboard interfaces are used in Compaq systems: PS/2-type and USB-type. System units that provide a PS/2 connector will ship with a PS/2-type keyboard but may also support simultaneous connection of a USB keyboard. Systems that do not provide a PS/2 interface will ship with a USB keyboard. For a detailed description of the PS/2 and USB interfaces refer to chapter 5 “Input/Output” of this guide.
Technical Reference Guide Appendix D COMPAQ/NVIDIA TNT2 PRO AGP GRAPHICS CARD D. Appendix D Compaq/NVIDIA TNT2 Pro AGP Graphics Card D.1 INTRODUCTION This appendix describes the Compaq/NVIDIA TNT2 Pro AGP Graphics Card used in the standard configuration on some models and also available as an option. This card (layout shown in the following figure) installs in a system’s AGP slot. The Compaq/NVIDIA TNT2 Pro graphics card (P/N 189998-B21) provides high 2D performance as well as 3D capabilities.
Appendix D Compaq/NVIDIA TNT2 Pro AGP Graphics Card D.2 FUNCTIONAL DESCRIPTION The NVIDIA TNT2 Pro-SD Graphics Card provides high performance 2D and 3D display imaging. The card’s AGP design provides an economical approach to 3D processing by offloading 3D effects such as texturing, z-buffering and alpha blending to the system memory while 16 megabytes of on-board SGRAM stores the main display image.
Technical Reference Guide D.3 DISPLAY MODES The graphics display modes supported by the NVIDIA TNT2 Pro Graphics are listed in Table D-1. Table D-1. NVIDIA TNT2 Pro Graphics Display Modes Table D-1.
Appendix D Compaq/NVIDIA TNT2 Pro AGP Graphics Card D.4 SOFTWARE SUPPORT INFORMATION The NVIDIA TNT2 Pro graphics card is fully compatible with software written for legacy video modes (VGA, EGA, CGA) and needs no driver support for those modes. Drivers are provided with or available for the card to provide extended mode support for the current operating systems and programming environments such as: ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ D.5 Windows 98, 95 Windows NT 4.0, 3.51 Windows 3.11, 3.
Technical Reference Guide D.6 CONNECTORS There are two connectors associated with the graphics subsystem; the display/monitor connector and the Feature connector. NOTE: The graphic card’s edge connector mates with the AGP slot connector on the system board. This interface is described in chapter 4 of this guide. The DB-15 disply/monitor connector is provided for connection of a compatible RGB/analog monitor. The Feature connector allows the attachment of an optional card such as a video tuner. D.6.
Appendix D Compaq/NVIDIA TNT2 Pro AGP Graphics Card This page is intentionally blank.
Technical Reference Guide Appendix E COMPAQ/NVIDIA GeForce2 GTS AGP GRAPHICS CARD E. Appendix E Compaq/NVIDIA GeForce2 GTS AGP Graphics Card E.1 INTRODUCTION This appendix describes the Compaq/NVIDIA GeForce2 GTS AGP Graphics Card used in the standard configuration on some models and also available as an option. This card (layout shown in the following figure) installs in a system’s AGP slot.
Appendix E Compaq/NVIDIA GeForce2 GTS AGP Graphics Card E.2 FUNCTIONAL DESCRIPTION The NVIDIA GeForce2 GTS-SD Graphics Card provides high performance 2D and 3D display imaging. The card’s AGP design provides an economical approach to 3D processing by offloading 3D effects such as texturing, z-buffering and alpha blending to the system memory while 32 megabytes of on-board SDRAM stores the main display image.
Technical Reference Guide E.3 DISPLAY MODES The graphics display modes supported by the NVIDIA GeForce2 GTS Graphics are listed in Table E-1. Table E-1. NVIDIA GeForce2 GTS Graphics Display Modes Table E-1.
Appendix E Compaq/NVIDIA GeForce2 GTS AGP Graphics Card E.4 SOFTWARE SUPPORT INFORMATION The NVIDIA GeForce2 GTS graphics card is fully compatible with software written for legacy video modes (VGA, EGA, CGA) and needs no driver support for those modes. Drivers are provided with or available for the card to provide extended mode support for the current operating systems and programming environments such as: ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ Windows 98, 95 Windows NT 4.0, 3.51 Windows 3.11, 3.
Technical Reference Guide E.6 CONNECTORS There are two connectors associated with the graphics subsystem; the display/monitor connector and the Feature connector. NOTE: The graphic card’s edge connector mates with the AGP slot connector on the system board. This interface is described in chapter 4 of this guide. E.6.1 MONITOR CONNECTOR The display/monitor connector is provided for connection of a compatible RGB/analog monitor. 5 4 10 15 3 9 14 2 8 13 1 7 12 6 11 Figure E-3.
Appendix E Compaq/NVIDIA GeForce2 GTS AGP Graphics Card E.6.2 VIDEO FEATURE CONNECTOR The Video Feature connector allows a video peripheral such as a TV tuner card to provide video input to the graphics card. This interface is compliant with VESA VIP specification 1.1. 26 / Y13 2 / Y1 1 / Z1 25 / Z13 Figure E-4. Feature Connector (26-Pin Header) Table E–4. Video In Connector Pinout Table E-4.
Technical Reference Guide Appendix F COMPAQ/LUCENT V.90 56K PCI MODEM F. Appendix F Compaq/Lucent V.90 56K PCI Modem F.1 INTRODUCTION This appendix describes the Compaq/Lucent V.90 56K PCI modem (Compaq SP# 146803-001). This modem installs in a PCI slot, allowing it to be auto-configured into the system. RJ-11 Connector NOTE: Actual layout may vary. Figure F-1. Compaq/Lucent V.90 56K PCI Modem (PCA #152972) Layout This appendix covers the following subjects: ♦ ♦ ♦ ♦ ♦ Functional description (F.
Appendix F Compaq/Lucent V.90 56K PCI Modem F.2 FUNCTIONAL DESCRIPTION The Compaq/Lucent V.90 56K PCI modem provides data communication over a standard telephone network at transfer rates of up to 56 kilobits per second. The modem also supports facsimile (fax) transfers at up to 14.4 kilobits per second. Auto-detection of operating speed and compression mode is also provided.
Technical Reference Guide F.3 OPERATING PARAMETERS The operating parameters consists of UART transfer rates and transmission modes. F.3.1 UART TRANSFER RATES The transfer rate between the modem’s UART and the PCI interface (also known as the DTE-toDCE transfer rate) is selectable and generally set to match the modem’s typical transmission mode.
Appendix F Compaq/Lucent V.90 56K PCI Modem F.4 POWER MANAGEMENT The modem supports both APM and ACPI power management environments using methods defined in the PCI 2.2 specification. F.4.1 APM ENVIRONMENT In the APM environment, the modem will be placed in Standby (as the result of either a userinitiated action or by OS timer) unless the modem is online or transferring data. If a thermal shutdown condition occurs, then the modem will be forced into Standby regardless of the operational state. F.4.
Technical Reference Guide Appendix G COMPAQ/ELSA Gloria II AGP GRAPHICS CARD G. Appendix G Compaq/ELSA Gloria II Graphics Card G.1 INTRODUCTION This appendix describes the Compaq/ELSA GLoria II AGP Graphics Card used in the standard configuration on some models and also available as an option. This card (layout shown in the following figure) installs in a system’s AGP slot. The Compaq/ELSA GLoria II graphics card (P/N 174565-001) provides high 2D performance as well as mid-level 3D capabilities.
Appendix G Compaq/ELSA GLoria II AGP Graphics Card G.2 FUNCTIONAL DESCRIPTION The ELSA GLoria II-SD Graphics Card provides high performance 2D and 3D display imaging. The card’s AGP design provides an economical approach to 3D processing by off-loading 3D effects such as texturing, z-buffering and alpha blending to the system memory while 64 megabytes of on-board SDRAM stores the main display image.
Technical Reference Guide G.3 DISPLAY MODES The graphics display modes supported by the ELSA GLoria II Graphics are listed in Table G-1. Table G-1. ELSA GLoria II Graphics Display Modes Table G-1. ELSA GLoria II Graphics Display Modes Memory Used Max. Vertical For Texture Resolution Bits per pixel Color Depth Refresh Freq. [1] 640 x 480 8 256 120 64.3 MB 640 x 480 16 65K 120 63.7 MB 640 x 480 32 16.7M 120 61.9 MB 800 x 600 8 256 120 63.6 MB 800 x 600 16 65K 120 62.7 MB 800 x 600 32 16.
Appendix G Compaq/ELSA GLoria II AGP Graphics Card G.4 SOFTWARE SUPPORT INFORMATION The ELSA GLoria II graphics card is fully compatible with software written for legacy video modes (VGA, EGA, CGA) and needs no driver support for those modes. Drivers are provided with or available for the card to provide extended mode support for the current operating systems and programming environments such as: ♦ ♦ ♦ ♦ ♦ ♦ ♦ Windows 2000 Windows NT 4.
Technical Reference Guide G.6 CONNECTORS There are two connectors associated with the graphics subsystem; the display/monitor connector and the Feature connector. NOTE: The graphic card’s edge connector mates with the AGP slot connector on the system board. This interface is described in chapter 4 of this guide. G.6.1 MONITOR CONNECTOR The display/monitor connector is provided for connection of a compatible RGB/analog monitor. 5 4 10 15 3 9 14 2 8 13 1 7 12 6 11 Figure G-3.
Appendix G Compaq/ELSA GLoria II AGP Graphics Card G.6.2 VIDEO FEATURE CONNECTOR The Video Feature connector allows a video peripheral such as a TV tuner card to provide video input to the graphics card. This interface is compliant with VESA VIP specification 1.1. 26 / Y13 2 / Y1 1 / Z1 25 / Z13 Figure G-4. Feature Connector (26-Pin Header) Table G–4. Video In Connector Pinout Table G-4.
Technical Reference Guide Appendix H COMPAQ/Matrox Millennium G450 AGP GRAPHICS CARD H. Appendix G Compaq/Matrox Millennium G450 AGP Graphics Card H.1 INTRODUCTION This appendix describes the Compaq/Matrox Millennium G450 AGP Graphics Card used in the standard configuration on some models and also available as an option. This card (layout shown in the following figure) installs in a system’s AGP slot.
Appendix H Compaq/Matrox Millennium G450 AGP Graphics Card H.2 FUNCTIONAL DESCRIPTION The Matrox Millennium G450-SD Graphics Card provides high performance 2D and 3D display imaging. The card’s AGP design provides an economical approach to 3D processing by offloading 3D effects such as texturing, z-buffering and alpha blending to the system memory while 32 megabytes of on-board SDRAM stores the main display image.
Technical Reference Guide H.3 DISPLAY MODES The graphics display modes supported by the Matrox Millennium G450 Graphics are listed in Table H-1. Table H-1. Matrox Millennium G450 Graphics Display Modes Table H-1. Matrox Millennium G450 Graphics Display Modes Supporting Max. Vertical RAMDAC Resolution Bits per pixel Color Depth Refresh Freq. [1] 640 x 480 8 256 85 Hz Primary 640 x 480 16 65K 85 Hz Primary, Secondary 640 x 480 24 16.7M 85 Hz Primary 640 x 480 32 16.
Appendix H Compaq/Matrox Millennium G450 AGP Graphics Card H.4 SOFTWARE SUPPORT INFORMATION The Matrox Millennium G450 graphics card is fully compatible with software written for legacy video modes (VGA, EGA, CGA) and needs no driver support for those modes. Drivers are provided with or available for the card to provide extended mode support for the current operating systems and programming environments such as: ♦ ♦ ♦ ♦ ♦ ♦ ♦ H.5 Windows 2000 Windows NT 4.
Technical Reference Guide H.6 CONNECTORS There are three connectors associated with the graphics subsystem; two display/monitor connectors and the Feature connector. NOTE: The graphic card’s edge connector mates with the AGP slot connector on the system board. This interface is described in chapter 4 of this guide. H.6.1 MONITOR CONNECTOR The display/monitor connector is provided for connection of a compatible RGB/analog monitor. 5 4 10 15 3 9 14 2 8 13 1 7 12 6 11 Figure H-3.
Appendix H Compaq/Matrox Millennium G450 AGP Graphics Card H.6.2 VIDEO FEATURE CONNECTOR The Video Feature connector allows a video peripheral such as a TV tuner card to provide video input to the graphics card. This interface is compliant with VESA VIP specification 1.1. 26 / Y13 2 / Y1 1 / Z1 25 / Z13 Figure H-4. Feature Connector (26-Pin Header) Table H–4. Video In Connector Pinout Table G-4.
Technical Reference Guide Appendix I COMPAQ/INTEL NETWORK INTERFACE CONTROLLER ADAPTERS I. Appendix I Compaq/Intel Network Interface Controller Adapters I.1 INTRODUCTION This appendix describes Compaq/Intel Network Interface Controller adapters that may be included in the standard configuration on some models and available as options for all models.
Appendix I Compaq/Intel Network Interface Controller Adapters I.2 FUNCTIONAL DESCRIPTION The Intel PRO/100+ and the PRO/100 S Management Adapters are based on the Intel 82559 and 82550 Ethernet Controllers (respectively) supported by firmware in flash ROM (Figure I-2). Each adapter can operate in half- or full-duplex modes and provides auto-negotiation of both mode and speed. Half-duplex operation features an Intel-proprietary collision reduction mechanism while full-duplex operation follows the IEEE 802.
Technical Reference Guide I.2.1 AOL FUNCTION The adapter’s Alert-On-LAN (AOL) function provides a AOL-compliant system unit with the ability to communicate system status to a management console, even while the system is powered down. When installed in an AOL-compliant system, the adapter receives alert messages from the system’s I/O Controller Hub (ICH) over the PCI bus.
Appendix I Compaq/Intel Network Interface Controller Adapters I.2.3 IPSEC FUNCTION The 82550 controller used on the Intel PRO/100 S Management Adapter includes an encryption engine that provides on-the-fly encryption and/or authentication of transmit data without additional use of system memory and software. This function, referred to as IP security (IPSEC), uses a configurable algorithm and established Data Encryption Standards (DES) to provide high performance (full transmission rate) encryption.
Technical Reference Guide I.3 POWER MANAGEMENT SUPPORT These adapters support APM and ACPI power management environments as well as the Wiredfor-Management (WfM) and Wake-On-LAN (WOL) standards. The adapter is designed to be powered up as long as the system unit is plugged into a live AC outlet to provide system “wakeup” functionality. Power is provided by either the auxiliary 3.3 VDC power rail of the PCI bus (when installed in systems compliant with PCI ver. 2.
Appendix I Compaq/Intel Network Interface Controller Adapters I.4 ADAPTER PROGRAMMING Programming the adapter consists of configuration, which occurs during POST, and control, which occurs at runtime. I.4.1 CONFIGURATION The adapter’s 82559 or 82550 NIC controller is a PCI device and configured though PCI configuration space registers using PCI protocol described in chapter 4 of this guide. The PCI configuration registers are listed in the following table: Table I-1.
Technical Reference Guide I.5 NETWORK CONNECTOR Figure I-3 shows the RJ-45 connector used for the NIC interface. This connector includes the two status LEDs as part of the connector assembly. Activity LED Speed LED Pin 1 2 3 6 Description Transmit+ TransmitReceive+ Receive- 8 7 6 5 4 3 2 1 Figure I-3. I.6 Ethernet TPE Connector (RJ-45, viewed from card edge) ADAPTER SPECIFICATIONS Table I-3. Adapter Operating Specifications Table I-3.
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Technical Reference Guide Appendix J COMPAQ/NVIDIA QUADRO2 MXR AGP GRAPHICS CARD J. Appendix J Compaq/NVIDIA Quadro2 MXR AGP Graphics Card J.1 INTRODUCTION This appendix describes the Compaq/NVIDIA Quadro2 MXR AGP Graphics Card used in the standard configuration on some models and also available as an option. This card (layout shown in the following figure) installs in a system’s AGP slot.
Appendix J Compaq/NVIDIA Quadro2 MXR AGP Graphics Card J.2 FUNCTIONAL DESCRIPTION The NVIDIA Quadro2 MXR Graphics Card provides high performance 2D and 3D display imaging. The card’s AGP design provides an economical approach to 3D processing by offloading 3D effects such as texturing, z-buffering and alpha blending to the system memory while 32 megabytes of on-board SDRAM stores the main display image.
Technical Reference Guide J.3 DISPLAY MODES The 2D graphics display modes supported by the NVIDIA Quadro2 MXR Graphics are listed in Table J-1. Table J-1. NVIDIA Quadro2 MXR Graphics Display Modes Table J-1. NVIDIA Quadro2 MXR Graphics Display Modes Max. Refresh Memory Used Resolution Bits per pixel Color Depth Frequency (Hz) [1] For Texture 640 x 480 8 256 240 N/A 640 x 480 16 65K 240 N/A 640 x 480 32 16.7M 240 28.4 MB 800 x 600 8 256 240 N/A 800 x 600 16 65K 240 N/A 800 x 600 32 16.7M 240 26.
Appendix J Compaq/NVIDIA Quadro2 MXR AGP Graphics Card J.4 SOFTWARE SUPPORT INFORMATION The NVIDIA Quadro2 MXR graphics card is fully compatible with software written for legacy video modes (VGA, EGA, CGA) and needs no driver support for those modes. Drivers are provided with or available for the card to provide extended mode support for the current operating systems and programming environments such as: ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ J.5 Windows 3.1, 95, 98, 2000, ME Windows NT 4.0, 3.
Technical Reference Guide J.6 CONNECTORS There are two connectors associated with the graphics subsystem; the display/monitor connector and the Feature connector. NOTE: The graphic card’s edge connector mates with the AGP slot connector on the system board. This interface is described in chapter 4 of this guide. The DB-15 disply/monitor connector is provided for connection of a compatible RGB/analog monitor. The Feature connector allows the attachment of an optional card such as a video tuner. J.6.
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Technical Reference Guide Appendix K COMPAQ PCI 10/100 ETHERNET ADAPTER K. Appendix K Compaq PCI 10/100 Ethernet Adapter K.1 INTRODUCTION This appendix describes Compaq PCI 10/100 Ethernet Adapter (SP# 118042-001) that may be included in the standard configuration on some models and available as options for all models. The adapter card installs in a PCI slot to provide a system with network interface capability.
Appendix K Compaq PCI 10/100 Ethernet Adapter K.2 FUNCTIONAL DESCRIPTION The Compaq PCI 10/100 NIC Adapter is based on the 3C905C Network Interface Controller supported by firmware in flash ROM (Figure K-2). The adapter can operate in half- or full-duplex modes and provide auto-negotiation of both mode and speed. Full-duplex operation follows the IEEE 802.3x flow control specification. Transmit and receive FIFOs of three kilobytes each reduce the chance of overrun while waiting for bus access.
Technical Reference Guide K.2.1 AOL FUNCTION The adapter’s Alert-On-LAN (AOL) function provides a AOL-compliant system unit with the ability to communicate system status to a management console, even while the system is powered down. When installed in an AOL-compliant system, the adapter receives alert messages from the system’s I/O Controller Hub (ICH) over the SMBus.
Appendix K Compaq PCI 10/100 Ethernet Adapter K.2.2 RSA FUNCTION This adapter provides support for systems using the Remote System Alert (RSA) method of generating alerts over the network. The RSA method is similar to the AOL function described previously but does not use the PCI’s SMBus for alert transactions. The RSA method uses an AOL/SOS connector is provided on the card for connection to a compliant system board through a 7-conductor cable assembly.
Technical Reference Guide K.3 POWER MANAGEMENT SUPPORT These adapters support APM and ACPI power management environments as well as the Wiredfor-Management (WfM) and Wake-On-LAN (WOL) standards. The adapter is designed to be powered up as long as the system unit is plugged into a live AC outlet to provide system “wakeup” functionality. Power is provided by either the auxiliary 3.3 VDC power rail of the PCI bus (when installed in systems compliant with PCI ver. 2.
Appendix K Compaq PCI 10/100 Ethernet Adapter K.4 CONNECTORS In addition to the PCI card edge connector, the NIC adapter includes four on-board connectors; the RJ-45 network connector, an AOL/SOS connector, a WOL connector, and a SMBus connector. K.4.1 NETWORK CONNECTOR Figure K-3 shows the RJ-45 connector used for the NIC interface. This connector includes the two status LEDs as part of the connector assembly.
Technical Reference Guide K.4.3 SMBUS CONNECTOR Figure K-5 shows the SMBus connector. This connector is used for systems employing AOL functionality and requiring a cable connection for SMBus activity. NOTE: Compaq desktop units do not require a cable connection for SMBus activity. 1 Pin 1 2 3 4 2 3 Description SMBus Data SMBus CSSMBus Clock Not connected 4 Figure K-5. AOL/SOS Connector (4-pin Header) K.4.4 WOL CONNECTOR Figure K-6 shows the WOL connector.
Appendix K Compaq PCI 10/100 Ethernet Adapter K.5 ADAPTER SPECIFICATIONS Table K-1. Adapter Specifications Table K-1.
Technical Reference Guide Appendix L COMPAQ/ADAPTEC 29160N SCSI HOST ADAPTER L. Appendix L Compaq/Adaptec SCSI Host Adapter L.1 INTRODUCTION The Compaq/Adaptec 29160N SCSI Host Adapter (Compaq SP# 158364-001) is a PCI peripheral that provides high performance interfacing with compatible SCSI peripherals, typically SCSI hard drives. The card installs in a PCI slot and supports full bus mastering capability. This appendix covers the following subjects: ♦ ♦ ♦ ♦ Functional description (L.
Appendix K Compaq PCI 10/100 Ethernet Adapter L.2 FUNCTIONAL DESCRIPTION A block diagram of the SCSI Adapter is shown in Figure L-2. The adapter’s architecture is based on the AIC-7892 SCSI controller working off the 32-bit, 66-/33-MHz PCI bus. Providing full bus mastering capability, the adapter supports data transfers up to 266 MB/s using the burst mode rate on a 66-MHz 32-bit PCI bus.
Technical Reference Guide L.3 SCSI ADAPTER PROGRAMMING L.3.1 SCSI ADAPTER CONFIGURATION The Adaptec SCSI Host Adapter Card is a PCI device and configured using PCI protocol and PCI Configuration Space registers (PCI addresses 00h-FFh) as discussed in Chapter 4 of this guide. Configuration is accomplished by BIOS during POST and re-configurable with software. The vender ID and device ID for the adapter are as follows: Vender ID (PCI config. addr. 00h): 9005h Device ID (PCI config, addr. 02h): 0080h L.3.
Appendix K Compaq PCI 10/100 Ethernet Adapter L.5 SCSI CONNECTORS This SCSI card provides two internal header-type connectors (one 50-pin, one 68-pin) and one external D-type connector (50-pin). L.5.1 EXTERNAL 50-PIN ULTRA SCSI CONNECTOR The card provides one external 50-pin D-type Ultra SCSI connector. External cabling should meet T-10 SPI-2 standards (50-conductor, round shielded). Pin 1 Figure L–3. External Ultra SCSI Connector (50-pin) Table L–3.
Technical Reference Guide L.5.2 INTERNAL 50-PIN ULTRA SCSI CONNECTOR The card provides one internal 50-pin header-type Ultra SCSI connector. Internal cabling to this connector should consists of an unshielded connector with a 50-conductor flat cable as specified in ANSI standard X3T9.2/375R. Pin 1 Pin 49 Pin 2 Pin 50 Figure L–4. Internal 50-Pin Ultra SCSI Connector Table L–4. Internal 50-Pin Ultra SCSI Connector Pinout Table L-4.
Appendix K Compaq PCI 10/100 Ethernet Adapter L.5.3 INTERNAL 68-PIN ULTRA160 SCSI CONNECTOR The card provides one internal 68-pin Ultra160 SCSI connector. This connection is designed for a 68-conductor unshielded Twist ‘N Flat cable as specified in the T-10 SPI-2 standard. Pin 34 Pin 1 Pin 68 Pin 35 Figure L–5. Ultra 160 SCSI Connector (68-pin header type) Table L–5. Ultra160 SCSI Connector Pinout Table L-5.
INDEX I.
I/O controller, 4-38 graphics card, D-1, E-1, F-1, G-1, H-1, J-1, K-1, L-1 graphics subsystem, 2-13 graphics, 3D, D-2, E-2, G-2, H-2, J-2 Hard drive activity indicator, 4-39 Hub link bus, 4-7 I/O controller (LPC47B34x), 4-37 I/O map, 4-35 IDE interface, 5-1 IDSEL, 4-4 index addressing, 1-2 interface audio, 2-14, 5-26 diskette drive, 5-4 IDE, 5-1 keyboard/pointing device, 5-16 parallel, 2-12, 5-11 serial, 2-12, 5-8 USB, 2-12, 5-22 interrupts maskable (IRQn), 4-15 nonmaskable (NMI, SMI), 4-17 interrupts, PCI,
security, interface, 4-32 sensor, thermal, 4-34 serial interface, 2-12, 5-8 SGRAM, D-2, J-2 sideband addressing, 4-11 signal distribution, 6-7, 6-8 SMBIOS, 7-16 SMI, 4-18 Sound Blaster 128 audio, 5-26 specifications electrical, 2-14 environmental, 2-14 physical, 2-15 power supply, 6-7, 6-8 Specifications 8x CD-ROM Drive, 2-16 Audio subsystem, 5-32 Diskette Drive, 2-15 SCSI Host Adapter, L-3 specifications, network adapter, I-7, K-8 specifications, system, 2-14 SSE2, 3-2 status, system (LED), 4-33, 4-39 syst
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