Technical data

5–26 Event Reporting: Templates and Codes

02422464 Cache failover attempt failed because the other cache was illegally

configured with DIMMs. Note that in this instance the Memory Address,

Byte Count, FX Chip register, Memory Controller register, and Diagnostic

02492401 The write cache module which is the mirror for the primary cache is

unexpectedly not present (missing). A cache is expected to be

configured and it may contain dirty write cached data. Note that in this

instance, the Memory Address, Byte Count, FX Chip register, Memory

Controller register, and Diagnostic register fields are undefined.

024A2401 Mirroring is enabled and the primary write cache module is expectedly

not present (missing). A cache is expected to be configured and it may

contain dirty write cached data. Note that in this instance, the Memory

Address, Byte Count, FX Chip register, Memory Controller register, and

Diagnostic register fields are undefined.

024B2401 Write-back caching has been disabled either due to a cache or battery-

related problem. The exact nature of the problem is reported by other

instance codes. Note that in this instance the Memory Address, Byte

Count, FX Chip register, Memory Controller register, and Diagnostic

024F2401 This cache module is populated with DIMMs incorrectly. Cache metadata

resident in the cache module indicates that unflushed write cache data

exists for a cache size different than what is found present. Note that in

this instance the Memory Address, Byte Count, FX Chip register, Memory

Controller register, and Diagnostic register fields are undefined.

0251000A This command failed because the target unit is not online to the

controller. The Information field of the Device Sense Data contains the

block number of the first block in error.

Table 5–1 Instance Codes (Continued)

Instance Code Description Template