Data Sheet

ManualsBrandsConrad Components ManualsEducation & Development Kits115452 LCD thermometer Assembly kit 9 V DC, 12 V DC -50 - 150 °C

SEMICONDUCTOR

ICL7106, ICL7107

ICL7106S, ICL7107S

Digit,

LCD/LED Display, A/D Converters

January 1998

Features

• Guaranteed Zero Reading for 0V Input on All Scales

• True Polarity at Zero for Precise Null Detection

• 1pA Typical Input Current

• True Differential Input and Reference, Direct Display Drive

- LCD ICL7106, LED lCL7107

• Low Noise - Less Than 15µV

P-P

• On Chip Clock and Reference

• Low Power Dissipation - Typically Less Than 10mW

• No Additional Active Circuits Required

• Enhanced Display Stability (ICL7106S, ICL7107S)

Description

The Harris ICL7106 and ICL7107 are high performance, low

power, 3

digit A/D converters. Included are seven seg-

ment decoders, display drivers, a reference, and a clock.

The ICL7106 is designed to interface with a liquid crystal dis-

play (LCD) and includes a multiplexed backplane drive; the

ICL7107 will directly drive an instrument size light emitting

diode (LED) display.

The ICL7106 and ICL7107 bring together a combination of

high accuracy, versatility, and true economy. It features auto-

zero to less than 10µV, zero drift of less than 1µV/

C, input

bias current of 10pA (Max), and rollover error of less than

one count. True differential inputs and reference are useful in

all systems, but give the designer an uncommon advantage

when measuring load cells, strain gauges and other bridge

type transducers. Finally, the true economy of single power

supply operation (ICL7106), enables a high performance

panel meter to be built with the addition of only 10 passive

components and a display.

Ordering Information

PART NO.

TEMP.

RANGE (

C) PACKAGE PKG. NO.

ICL7106CPL 0 to 70 40 Ld PDIP E40.6

ICL7106RCPL 0 to 70 40 Ld PDIP (Note) E40.6

ICL7106CM44 0 to 70 44 Ld MQFP Q44.10x10

ICL7106SCPL 0 to 70 40 Ld PDIP E40.6

ICL7107SCPL 0 to 70 40 Ld PDIP E40.6

ICL7107CPL 0 to 70 40 Ld PDIP E40.6

ICL7107RCPL 0 to 70 40 Ld PDIP (Note) E40.6

ICL7107CM44 0 to 70 44 Ld MQFP Q44.10x10

NOTE: “R” indicates device with reversed leads for mounting to PC

board underside. “S” indicates enhanced stability.

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

File Number 3082.2

Summary of content (16 pages)

PAGE 1
ICL7106, ICL7107 ICL7106S, ICL7107S S E M I C O N D U C T O R 3 1/2 Digit, LCD/LED Display, A/D Converters January 1998 Features Description • Guaranteed Zero Reading for 0V Input on All Scales The Harris ICL7106 and ICL7107 are high performance, low power, 31/2 digit A/D converters. Included are seven segment decoders, display drivers, a reference, and a clock.
PAGE 2
ICL7106, ICL7107, ICL7106S, ICL7107S Pinouts ICL7106, ICL7107 (PDIP) TOP VIEW 1 40 OSC 1 OSC 1 1 40 V+ 2 39 OSC 2 OSC 2 2 39 D1 C1 3 38 OSC 3 OSC 3 3 38 C1 B1 4 37 TEST TEST 4 37 B1 A1 5 36 REF HI REF HI 5 36 A1 F1 6 35 REF LO REF LO 6 35 F1 G1 7 7 34 G1 8 34 CREF+ 33 CREF- CREF+ E1 CREF- 8 33 E1 D2 9 32 COMMON COMMON 9 32 D2 C2 10 31 IN HI IN HI 10 31 C2 B2 11 30 IN LO IN LO 11 30 B2 A2 12 29 A-Z A-Z 12 29 A2 BUFF 13 28 F2 INT 14 27 E2 V
PAGE 3
ICL7106, ICL7107, ICL7106S, ICL7107S Absolute Maximum Ratings Thermal Information Supply Voltage ICL7106, V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V ICL7107, V+ to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V ICL7107, V- to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-9V Analog Input Voltage (Either Input) (Note 1). . . . . . . . . . . . . V+ to VReference Input Voltage (Either Input) . . . . . . . . . . . . . . . .
PAGE 4
ICL7106, ICL7107, ICL7106S, ICL7107S Electrical Specifications (Note 3) (Continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT (Except Pins 19 and 20) 5 8 - mA Pin 19 Only 10 16 - mA Pin 20 Only 4 7 - mA DISPLAY DRIVER ICL7107 ONLY Segment Sinking Current V+ = 5V, Segment Voltage = 3V NOTES: 3. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board. 4.
PAGE 5
ICL7106, ICL7107, ICL7106S, ICL7107S Design Information Summary Sheet • OSCILLATOR FREQUENCY • DISPLAY COUNT V IN COUNT = 1000 × --------------V REF fOSC = 0.45/RC COSC > 50pF; ROSC > 50kΩ fOSC (Typ) = 48kHz • CONVERSION CYCLE • OSCILLATOR PERIOD tCYC = tCL0CK x 4000 tCYC = tOSC x 16,000 when fOSC = 48kHz; tCYC = 333ms tOSC = RC/0.45 • INTEGRATION CLOCK FREQUENCY • COMMON MODE INPUT VOLTAGE fCLOCK = fOSC/4 (V- + 1V) < VlN < (V+ - 0.
PAGE 6
ICL7106, ICL7107, ICL7106S, ICL7107S Detailed Description the end of this phase, the polarity of the integrated signal is determined. Analog Section De-Integrate Phase Figure 3 shows the Analog Section for the ICL7106 and ICL7107. Each measurement cycle is divided into three phases. They are (1) auto-zero (A-Z), (2) signal integrate (INT) and (3) de-integrate (DE). The final phase is de-integrate, or reference integrate.
PAGE 7
ICL7106, ICL7107, ICL7106S, ICL7107S should be since this removes the common mode voltage from the reference system. Differential Reference The reference voltage can be generated anywhere within the power supply voltage of the converter. The main source of common mode error is a roll-over voltage caused by the reference capacitor losing or gaining charge to stray capacity on its nodes.
PAGE 8
ICL7106, ICL7107, ICL7106S, ICL7107S Digital Section The second function is a “lamp test”. When TEST is pulled high (to V+) all segments will be turned on and the display should read “1888”. The TEST pin will sink about 15mA under these conditions. Figures 7 and 8 show the digital section for the ICL7106 and ICL7107, respectively. In the ICL7106, an internal digital ground is generated from a 6V Zener diode and a large P-Channel source follower.
PAGE 9
ICL7106, ICL7107, ICL7106S, ICL7107S a a a f g b f b e a f b g c e c d e c d 7 SEGMENT DECODE TYPICAL SEGMENT OUTPUT V+ b g c d 7 SEGMENT DECODE 7 SEGMENT DECODE LATCH 0.5mA TO SEGMENT 1000’s COUNTER 100’s COUNTER 10’s COUNTER 1’s COUNTER 8mA TO SWITCH DRIVERS FROM COMPARATOR OUTPUT DIGITAL GROUND V+ 1 V+ CLOCK ÷4 † 37 LOGIC CONTROL † THREE INVERTERS 27 ONE INVERTER SHOWN FOR CLARITY 40 OSC 1 39 OSC 2 TEST 500Ω DIGITAL GROUND 38 OSC 3 FIGURE 8.
PAGE 10
ICL7106, ICL7107, ICL7106S, ICL7107S Component Value Selection Reference Voltage Integrating Resistor The analog input required to generate full scale output (2000 counts) is: VlN = 2VREF . Thus, for the 200mV and 2V scale, VREF should equal 100mV and 1V, respectively. However, in many applications where the A/D is connected to a transducer, there will exist a scale factor other than unity between the input voltage and the digital reading.
PAGE 11
ICL7106, ICL7107, ICL7106S, ICL7107S Typical Applications Application Notes The ICL7106 and ICL7107 may be used in a wide variety of configurations. The circuits which follow show some of the possibilities, and serve to illustrate the exceptional versatility of these A/D converters. NOTE # The following application notes contain very useful information on understanding and applying this part and are available from Harris Semiconductor. AnswerFAX DOC.
PAGE 12
ICL7106, ICL7107, ICL7106S, ICL7107S Typical Applications (Continued) TO PIN 1 OSC 1 40 TO PIN 1 OSC 1 40 100kΩ OSC 2 39 OSC 2 39 OSC 3 38 TEST 37 OSC 3 38 SET VREF = 100mV 100pF TEST 37 REF HI 36 CREF 33 V+ 1kΩ 10kΩ 10kΩ A-Z 29 BUFF 28 CREF 34 CREF 33 1.2V (ICL8069) 1MΩ IN LO 30 - A3 23 V- V - 26 C3 24 TO DISPLAY A3 23 G3 22 GND 21 FIGURE 13. ICL7107 WITH AN EXTERNAL BAND-GAP REFERENCE (1.2V TYPE) 100kΩ TEST 37 25kΩ CREF 34 24kΩ CREF 33 0.1µF +5V 1kΩ 1MΩ 0.
PAGE 13
ICL7106, ICL7107, ICL7106S, ICL7107S Typical Applications (Continued) TO PIN 1 OSC 1 40 TO PIN 1 V+ OSC 1 40 100kΩ 100kΩ OSC 2 39 OSC 2 39 OSC 3 38 OSC 3 38 100pF TEST 37 REF HI 36 REF HI 36 REF LO 35 REF LO 35 CREF 34 CREF 34 0.1µF CREF 33 CREF 33 SCALE FACTOR ADJUST 100pF TEST 37 100kΩ 1MΩ 100kΩ 220kΩ 0.1µF 22kΩ COMMON 32 COMMON 32 IN HI 31 IN HI 31 IN LO 30 IN LO 30 0.47µF 47kΩ BUFF 28 0.47µF A-Z 29 A-Z 29 ZERO ADJUST 0.
PAGE 14
ICL7106, ICL7107, ICL7106S, ICL7107S Typical Applications (Continued) TO PIN 1 OSC 1 40 100kΩ OSC 2 39 10µF SCALE FACTOR ADJUST (VREF = 100mV FOR AC TO RMS) OSC 3 38 TEST 37 100pF 5µF CA3140 REF HI 36 - REF LO 35 CREF 34 CREF 33 1N914 1kΩ 22kΩ 470kΩ 0.1µF 2.2MΩ COMMON 32 10kΩ 1µF 4.3kΩ 0.22µF 47kΩ 10µF + 9V - INT 27 V - 26 1µF 0.47µF A-Z 29 BUFF 28 10kΩ 1µF IN HI 31 IN LO 30 100pF (FOR OPTIMUM BANDWIDTH) 0.
PAGE 15
ICL7106, ICL7107, ICL7106S, ICL7107S Dual-In-Line Plastic Packages (PDIP) E40.6 (JEDEC MS-011-AC ISSUE B) N 40 LEAD DUAL-IN-LINE PLASTIC PACKAGE E1 INDEX AREA 1 2 3 INCHES N/2 SYMBOL -B- A2 -C- SEATING PLANE e B1 D1 B 0.010 (0.25) M A1 eC C A B S MAX NOTES - 0.250 - 6.35 4 0.015 - 0.39 - 4 A2 0.125 0.195 3.18 4.95 - B 0.014 0.022 0.356 0.558 - C L B1 0.030 0.070 0.77 1.77 8 eA C 0.008 0.015 0.204 0.381 - D 1.980 2.095 D1 0.
PAGE 16
ICL7106, ICL7107, ICL7106S, ICL7107S Metric Plastic Quad Flatpack Packages (MQFP/PQFP) Q44.10x10 (JEDEC MO-108AA-2 ISSUE A) D 44 LEAD METRIC PLASTIC QUAD FLATPACK PACKAGE D1 -D- -B- -AE E1 e PIN 1 INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.093 - 2.35 - A1 0.004 0.010 0.10 0.25 - A2 0.077 0.083 1.95 2.10 - B 0.012 0.018 0.30 0.45 6 B1 0.012 0.016 0.30 0.40 - D 0.510 0.530 12.95 13.45 3 D1 0.390 0.398 9.90 10.10 4, 5 E 0.510 0.530 12.