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Table Of Contents

1 Schematic diagrams
- Figure 1. Block diagram
- Figure 2. Schematic diagram
2 Absolute maximum ratings and operating conditions
- Table 1. Absolute maximum ratings
- Table 2. Operating conditions
3 Electrical characteristics
4 Application information
5 Package information
- 5.1 DIP8 package information
  - Figure 22. DIP8 package mechanical drawing
  - Table 4. DIP8 package mechanical data
- 5.2 SO-8 package information
  - Figure 23. SO-8 package mechanical drawing
  - Table 5. SO-8 package mechanical data
6 Ordering information
- Table 6. Order codes
7 Revision history
- Table 7. Document revision history

January 2012 Doc ID 2182 Rev 6 1/20

NE555

SA555 - SE555

General-purpose single bipolar timers

Features

■ Low turn-off time

■ Maximum operating frequency greater than

500 kHz

■ Timing from microseconds to hours

■ Operates in both astable and monostable

modes

■ Output can source or sink up to 200 mA

■ Adjustable duty cycle

■ TTL compatible

■ Temperature stability of 0.005% per °C

Description

The NE555, SA555, and SE555 monolithic timing

circuits are highly stable controllers capable of

producing accurate time delays or oscillation. In

the time delay mode of operation, the time is

precisely controlled by one external resistor and

capacitor. For a stable operation as an oscillator,

the free running frequency and the duty cycle are

both accurately controlled with two external

resistors and one capacitor.

The circuit may be triggered and reset on falling

waveforms, and the output structure can source

or sink up to 200 mA.

DIP8

(Plastic package)

SO8

(Plastic micropackage)

1 - GND

2 - Trigger

3 - Output

4 - Reset

5 - Control voltage

6 - Threshold

7 - Discharge

8 - V

Pin connections

(top view)

www.st.com

Summary of content (20 pages)

PAGE 1
NE555 SA555 - SE555 General-purpose single bipolar timers Features ■ Low turn-off time ■ Maximum operating frequency greater than 500 kHz ■ Timing from microseconds to hours ■ Operates in both astable and monostable modes ■ Output can source or sink up to 200 mA ■ Adjustable duty cycle ■ TTL compatible ■ Temperature stability of 0.
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Schematic diagrams 1 NE555 - SA555 - SE555 Schematic diagrams Figure 1. Block diagram VCC+ 5kΩ COMP THRESHOLD CONTROL VOLTAGE DISCHARGE R FLIP-FLOP Q 5kΩ COMP OUT TRIGGER S INHIBIT/ RESET 5kΩ RESET Figure 2.
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NE555 - SA555 - SE555 2 Absolute maximum ratings and operating conditions Absolute maximum ratings and operating conditions Table 1.
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Electrical characteristics NE555 - SA555 - SE555 3 Electrical characteristics Table 3. Tamb = +25° C, VCC = +5 V to +15 V (unless otherwise specified) SE555 Symbol Unit Min. ICC NE555 - SA555 Parameter Typ. Max. 3 10 2 Timing error (monostable) (RA = 2 kΩ to 100 kΩ, C = 0.1 μF) Initial accuracy (1) Drift with temperature Drift with supply voltage 0.5 30 0.05 Timing error (astable) (RA, RB = 1 kΩ to 100 kΩ, C = 0.
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NE555 - SA555 - SE555 Table 3. Electrical characteristics Tamb = +25° C, VCC = +5 V to +15 V (unless otherwise specified) (continued) SE555 Symbol VOH Idis(off) High level output voltage VCC = +15 VIO(sink) = 200 mA IO(sink) = 100 mA VCC = +5 V IO(sink) = 100 mA Unit Min. Typ. 13 3 12.5 13.3 3.3 Discharge pin leakage current (output high) Vdis = 10 V toff Max. Min. 12.7 5 2.75 Typ. Max. 12.5 13.3 3.
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Electrical characteristics NE555 - SA555 - SE555 Figure 3. Minimum pulse width required for triggering Figure 4. Supply current versus supply voltage Figure 5. Delay time versus temperature Figure 6. Low output voltage versus output sink current Figure 7. Low output voltage versus output sink current Figure 8.
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NE555 - SA555 - SE555 Figure 9. Electrical characteristics High output voltage drop versus output Figure 10. Delay time versus supply voltage Figure 11.
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Application information NE555 - SA555 - SE555 4 Application information 4.1 Monostable operation In the monostable mode, the timer generates a single pulse. As shown in Figure 12, the external capacitor is initially held discharged by a transistor inside the timer. Figure 12. Typical schematics in monostable operation VCC = 5 to 15V Reset R1 8 4 Trigger 7 2 NE555 Output 6 5 3 1 C1 Control Voltage 0.01μF The circuit triggers on a negative-going input signal when the level reaches 1/3 VCC.
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NE555 - SA555 - SE555 Application information Figure 13. Waveforms in monostable operation t = 0.1 ms / div INPUT = 2.0V/div OUTPUT VOLTAGE = 5.0V/div CAPACITOR VOLTAGE = 2.0V/div R1 = 9.1kΩ, C1 = 0.01μF, RL = 1kΩ Figure 14. Pulse duration versus R1C1 0.01 0.001 10 μs 4.2 Ω 10 M 0.1 10 k R 1= 1.0 Ω 10 0k Ω 1M Ω 1k Ω C (μF) 10 100 μs 1.
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Application information NE555 - SA555 - SE555 Figure 15. Typical schematics in astable operation VCC = 5 to 15V R1 8 4 Output 3 7 NE555 Control Voltage R2 6 5 0.01μF 1 2 C1 Figure 16 shows the actual waveforms generated in this mode of operation. The charge time (output HIGH) is given by: t1 = 0.693 (R1 + R2) C1 and the discharge time (output LOW) by: t2 = 0.693 (R2) C1 Thus the total period T is given by: T = t1 + t2 = 0.693 (R1 + 2R2) C1 The frequency of oscillation is then: 1 1.
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NE555 - SA555 - SE555 Application information Figure 16. Waveforms in astable operation t = 0.5 ms / div OUTPUT VOLTAGE = 5.0V/div CAPACITOR VOLTAGE = 1.0V/div R1 = R2 = 4.8kΩ, C1= 0.1μF, RL = 1kΩ Figure 17. Free running frequency versus R1, R2 and C1 C (μF) 10 1.0 R 1 1k Ω 10 kΩ + 0.1 0.01 0.001 0.
PAGE 12
Application information 4.3 NE555 - SA555 - SE555 Pulse width modulator When the timer is connected in the monostable mode and triggered with a continuous pulse train, the output pulse width can be modulated by a signal applied to pin 5. Figure 18 shows the circuit. Figure 18. Pulse width modulator VCC RA 8 4 Trigger 7 2 NE555 6 Modulation Input 5 3 Output C 1 4.
PAGE 13
NE555 - SA555 - SE555 Application information Figure 20 shows the waveforms generator by the linear ramp. The time interval is given by: (2/3 Vcc RE (R1+R2) C T = ---------------------------------------------------------------- VBE = 0.6V R1 Vcc - VBE (R1+R2) Figure 20. Linear ramp VCC = 5 V Time: 20 µs/DIV R1 + 47 kΩ R2 = 100 kΩ RE = 2.7 kΩ C = 0.01 µF 4.
PAGE 14
Application information Figure 21. NE555 - SA555 - SE555 50% duty cycle oscillator VCC VCC RA 51kΩ 4 8 RB 7 2 22kΩ NE555 Out 6 5 3 1 0.01μF C 0.01μF Note that this circuit will not oscillate if RB is greater than 1/2 RA because the junction of RA and RB cannot bring pin 2 down to 1/3 VCC and trigger the lower comparator. 4.6 Additional information Adequate power supply bypassing is necessary to protect associated circuitry. The minimum recommended is 0.1 µF in parallel with 1 µF electrolytic.
PAGE 15
NE555 - SA555 - SE555 5 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
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Package information 5.1 NE555 - SA555 - SE555 DIP8 package information Figure 22. DIP8 package mechanical drawing Table 4. DIP8 package mechanical data Dimensions Ref. Millimeters Min. Typ. A Max. Min. Typ. 5.33 Max. 0.210 A1 0.38 0.015 A2 2.92 3.30 4.95 0.115 0.130 0.195 b 0.36 0.46 0.56 0.014 0.018 0.022 b2 1.14 1.52 1.78 0.045 0.060 0.070 c 0.20 0.25 0.36 0.008 0.010 0.014 D 9.02 9.27 10.16 0.355 0.365 0.400 E 7.62 7.87 8.26 0.300 0.310 0.
PAGE 17
NE555 - SA555 - SE555 5.2 Package information SO-8 package information Figure 23. SO-8 package mechanical drawing Table 5. SO-8 package mechanical data Dimensions Ref. Millimeters Min. Typ. A Inches Max. Min. Typ. 1.75 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 D 4.80 4.90 5.00 0.189 0.193 0.197 E 5.80 6.00 6.20 0.228 0.236 0.244 E1 3.80 3.90 4.00 0.150 0.154 0.157 e 0.25 Max. 0.004 0.010 0.049 1.27 0.050 h 0.25 0.50 0.
PAGE 18
Ordering information 6 NE555 - SA555 - SE555 Ordering information Table 6. Order codes Part number Temperature range NE555N (1) SO-8 SA555N Marking Tube NE555N (1) Tube NE555 Tube SA555N SO-8 Tube(1) or tape & reel SA555 Tube SE555N DIP8 -55 °C, + 125 °C SO-8 Tube(1) 1. Not recommended for new design. Contact local ST sales office for availability.
PAGE 19
NE555 - SA555 - SE555 7 Revision history Revision history Table 7. Document revision history Date Revision 01-Jun-2003 1 2004-2006 2-3 15-Mar-2007 4 Expanded order code table. Template update. 5 Added IOUT value in Table 1: Absolute maximum ratings and Table 2: Operating conditions. Added ESD tolerance, latch-up tolerance, Rthja and Rthjcin Table 1: Absolute maximum ratings. 6 Modified duty cycle equation in Section 4.2: Astable operation.
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NE555 - SA555 - SE555 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.