Datasheet

OPT3001

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SBOS681B –JULY 2014–REVISED DECEMBER 2014

7.6.1.1.4 High-Limit Register (offset = 03h) [reset = BFFFh]

The high-limit register sets the upper comparison limit for the interrupt reporting mechanisms: the INT pin, the

flag high field (FH), and flag low field (FL), as described in the Interrupt Operation, INT Pin, and Interrupt

Reporting Mechanisms section. The format of this register is almost identical to the format of the low-limit register

(described in the Low-Limit Register) and the result register (described in the Result Register). To explain the

similarity in more detail, the high-limit register exponent (HE[3:0]) is similar to the low-limit register exponent

(LE[3:0]) and the result register exponent (E[3:0]). The high-limit register result (TH[11:0]) is similar to the low-

limit result (TH[11:0]) and the result register result (R[11:0]). Note that the comparison of the high-limit register

with the result register is unaffected by the ME bit.

When using a manually-set, full-scale range with the mask enable (ME) active, programming the manually-set,

full-scale range into the HE[3:0] bits can simplify the choice of values required to program into this register. The

formula to translate this register into lux is similar to Equation 4. The full-scale values are similar to Table 9.

Figure 26. High-Limit Register

15 14 13 12 11 10 9 8

HE3 HE2 HE1 HE0 TH11 TH10 TH9 TH8

R/W R/W R/W R/W R/W R/W R/W R/W

7 6 5 4 3 2 1 0

TH7 TH6 TH5 TH4 TH3 TH2 TH1 TH0

R/W R/W R/W R/W R/W R/W R/W R/W

LEGEND: R/W = Read/Write

Table 14. High-Limit Register Field Descriptions

Bit Field Type Reset Description

Exponent.

15:12 HE[3:0] R/W Bh

These bits are the exponent bits.

Result.

11:0 TH[11:0] R/W FFFh

These bits are the result in straight binary coding (zero to full-scale).

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