User manual

Independent Watchdog
The system watchdog circuit is mounted on the motherboard and is composed of a
DS1306 real-time clock chip, which sends periodic interrupt requests to the TT8v2, and a
hardware counter, which can restart the TT8v2 if the IRQ from the DS1306 is not acknowledged.
The watchdog circuit receives power from the main lithium battery. However, if the
power supply is interrupted, the watchdog continues to function with an independent back-up
power supply in the form of a “super cap”, a large capacity capacitor that functions like a
rechargeable battery. The super cap, once fully charged, can keep the watchdog active for several
days in the absence of power from the main lithium battery.
The DS1306 chip operates autonomously. The TT8v2 and the DS1306 communicate
through a SPI (Serial Peripheral Interface) port and an IRQ (interrupt request) line. Whenever the
operator sets the TT8v2’s Real-time Clock (RTC), the DS1306 RTC is automatically set by the
system. To avoid confusion, the watchdog clock is referred to as the WDC and RTC is reserved
to denote the TT8v2 real-time clock. Both the RTC and the WDC are accurate to approximately
1 second per day (1 minute per month). In addition to maintaining an independent real-time
clock, the DS1306 steers a small current (≤1 mA) into the super capacitor whenever the main
lithium battery is connected. The trickle of charge assures that the independent power supply will
be ready if needed.
NOTE
The watchdog circuit produces a small current drain compared to the maximum charging current
(the initial current into an uncharged capacitor is limited to approximately 1 mA, which
decreases as the voltage across the capacitor increases from zero).
The hardware counter is driven by a 32.768 KHz square wave generated by the DS1306.
Once reset to zero by the TT8v2, the counter will “roll over” after about 68 minutes. The roll-
over triggers a “one-shot” pulse on the master clear line of the TT8v2. The pulse is the
equivalent of a hardware reset and forces the TT8v2 to reboot. Master clear is functionally
similar to that button on the front of your PC that you have to push when the computer is fully
crashed and unresponsive to all keystroke combinations.
When power is first applied to the MMP, the firmware performs a number of
initialization procedures. Among these tasks, the watchdog counter is reset to zero and the
DS1306 is programmed to send an interrupt request to the TT8v2 at one minute after the hour
Appendix B-8