Installation Manual

Table Of Contents
IRIS OEM Edition Hardware Reference Manual
Doc. # 7430-0549-01 Rev. B Page 21
single ended voltage inputs are reference to 0V (GND). The ADC ports are high impedance
inputs to the ADC, used for voltage sampling. The uppermost bits (ADC[4..7]) also support the
JTAG interface. The JTAG port can be enabled by choosing that option in the fuse bits for the
processor. Choosing the JTAG active option will cause approximately 50k ohms to be applied
from the ADC pin to VCC. This setting can affect the accuracy of ADC readings from weak
sources.
Table 4-5. JTAG Pin Definitions
PIN PORT
ADC4 TCK
ADC5 TMS
ADC6 TDO
ADC7 TDI
RSTN RSTN
The JTAG programming capability supports:
Flash programming and verifying
EEPROM programming and verifying
Fuse programming and verifying
Lock bit programming and verifying
4.5.7 GPIO
The remainder of the I/O pins is available as GPIO under processor configuration control. All
GPIO ports have true Read-Modify-Write functionality when used as general digital I/O ports.
This means that the direction of one port pin can be changed without unintentionally changing
the direction of any other pin with the SBI and CBI instructions. The same applies when
changing drive value (if configured as output) or enabling/disabling of pull-up resistors (if
configured as input). They can be left floating if not used, or can be set as inputs with a weak
pull-up, outputs set high, or outputs set low.