User's Manual
Table Of Contents
- General Description
- Benefits
- More Information
- Contents
- Overview
- Pad Connection Interface
- Recommended Host PCB Layout
- Power Supply Connections and Recommended External Components
- Electrical Specification
- Environmental Specifications
- Regulatory Information
- Packaging
- Ordering Information
- Acronyms
- Document Conventions
- Document History Page
- Sales, Solutions, and Legal Information
Document Number: 002-15631 Rev.PRELIMINARY Page 24 of 38
PRELIMINARY
CYBLE-212006-01
CYBLE-202007-01
CYBLE-202013-11
Voltage Monitors (LVD)
SWD Interface
Table 45. Voltage Monitor DC Specifications
Parameter Description Min Typ Max Units Details/Conditions
V
LVI1
LVI_A/D_SEL[3:0] = 0000b 1.71 1.75 1.79 V –
V
LVI2
LVI_A/D_SEL[3:0] = 0001b 1.76 1.80 1.85 V –
V
LVI3
LVI_A/D_SEL[3:0] = 0010b 1.85 1.90 1.95 V –
V
LVI4
LVI_A/D_SEL[3:0] = 0011b 1.95 2.00 2.05 V –
V
LVI5
LVI_A/D_SEL[3:0] = 0100b 2.05 2.10 2.15 V –
V
LVI6
LVI_A/D_SEL[3:0] = 0101b 2.15 2.20 2.26 V –
V
LVI7
LVI_A/D_SEL[3:0] = 0110b 2.24 2.30 2.36 V –
V
LVI8
LVI_A/D_SEL[3:0] = 0111b 2.34 2.40 2.46 V –
V
LVI9
LVI_A/D_SEL[3:0] = 1000b 2.44 2.50 2.56 V –
V
LVI10
LVI_A/D_SEL[3:0] = 1001b 2.54 2.60 2.67 V –
V
LVI11
LVI_A/D_SEL[3:0] = 1010b 2.63 2.70 2.77 V –
V
LVI12
LVI_A/D_SEL[3:0] = 1011b 2.73 2.80 2.87 V –
V
LVI13
LVI_A/D_SEL[3:0] = 1100b 2.83 2.90 2.97 V –
V
LVI14
LVI_A/D_SEL[3:0] = 1101b 2.93 3.00 3.08 V –
V
LVI15
LVI_A/D_SEL[3:0] = 1110b 3.12 3.20 3.28 V –
V
LVI16
LVI_A/D_SEL[3:0] = 1111b 4.39 4.50 4.61 V –
LVI_IDD Block current – – 100
μA–
Table 46. Voltage Monitor AC Specifications
Parameter Description Min Typ Max Units Details/Conditions
T
MONTRIP
Voltage monitor trip time – – 1 μs–
Table 47. SWD Interface Specifications
Parameter Description Min Typ Max Units Details/Conditions
F_SWDCLK1 3.3 V ≤ V
DD
≤ 5.5 V – – 14 MHz SWDCLK ≤ 1/3 CPU clock frequency
F_SWDCLK2 1.71 V ≤ V
DD
≤ 3.3 V – – 7 MHz SWDCLK ≤ 1/3 CPU clock frequency
T_SWDI_SETUP T = 1/f SWDCLK 0.25 × T – – ns –
T_SWDI_HOLD T = 1/f SWDCLK 0.25 × T – – ns –
T_SWDO_VALID T = 1/f SWDCLK – – 0.5 × T ns –
T_SWDO_HOLD T = 1/f SWDCLK 1 – – ns –