User's Manual

Document Number: 002-19525 Rev. ** Page 10 of 49
PRELIMINARY
CYBT-343026-01
CYBT-343029-01
CYBT-143038-01
Table 5. CYBT-143038-01 Solder Pad
Pad Pad Name UART SPI
1
1. The CYBT-143038-01 contains two SPI peripherals, SPI1 and SPI2. SPI1 supports only master or slave modes, whereas SPI2 supports master only mode. The con-
nections shown in Table 5 above detail the SPI function for the given mode shown in parenthesis. If external memory is used with the CYBT-143038-01, then SPI2
should be used as the interface.
I2C ADC QD
2
2. Quadrature Decoder
CLK/XTAL GPIO
Other
1P0/P34
PUART_TX/P0
PUART_RX/P34
SPI1_MOSI/P0
(master/slave)
IN29/P0
IN5/P34
DY0/P34
3 PCM_Sync
I2S_WS
2 I2C_SCL SCL
3XRES External reset
4 I2C_SDA SDA
5 P2/P37/P28 PUART_RX/P2
SPI1_CS(slave)/P2
SPI1_MOSI(master)/
P2
SPI1_MISO(slave)/P3
7
SCL/P37
IN11/P28
IN2/P37
DX0/P2
OC2/P28
DZ1/P37
ACK1/P37 3
6 SPI2_CS_N
SPI2 active-low chip
select
7 GND Ground
8 SPI2_MISO
SPI2_MISO
(master)
SCL
9 SPI2_MOSI
SPI2_MOSI
(master)
SDA
10 SPI2_CLK
SPI2_CLK
(master)
11 GPIO_0
SPI1_CLK/P36
SPI1_MOSI/P38
(master/slave)
IN3/P36
IN1/P38
DZ0/P36 ACLK0/P36
3
(DevWake)
~TX_PD/P36
12 GPIO_1
PUART_RX/P25
PUART_TX/P32
SPI1_MISO/P25
(master/slave)
SPI1_CS/P32
(slave)
IN7/P32 DX0/P32 ACLK0/P32
3
(Host Wake)
13 GND Ground
14 GPIO_4
PUART_RTS/P6
PUART_TX/P31
SPI1_CS/P6
(slave)
IN8/P31 DZ0/P6
3
(GCI)
Ext LPO In
15 P4/P24
PUART_RX/P4
PUART_TX/P24
SPI1_MOSI/P6
(master/slave)
SPI1_CLK/P24
(master/slave)
DY0/P4 3
(CLK_REQ)
16 UART_TXD UART transmit data
17 UART_CTS UART clear to send input
18 UART_RTS UART request to send output
19 GPIO_7 PUART_RTS/P30 IN9/P30
3
(GCI)
20 UART_RXD UART receive data
21 VDDIN VDDIN (3.0V ~ 3.6V)
22 GPIO_3 UART_RX/P33
SPI1_MOSI/P27
(master/slave)
SPI1_MOSI/P33
(slave)
IN6/P33
OC1/P27
DX1/P33
ACLK1/P33 3
PWM2/P27
23 GPIO_6
SPI1_CS/P26
(slave)
IN24/P11 OC0/P26
3
(GCI)
PWM1/P26
24 GND Ground