User's Manual
Table Of Contents
- General Description
- Benefits
- More Information
- Overview
- Pad Connection Interface
- Recommended Host PCB Layout
- Module Connections
- Connections and Optional External Components
- Bluetooth Baseband Core
- Microprocessor Unit
- Integrated Radio Transceiver
- Collaborative Coexistence
- Global Coexistence Interface
- Peripheral Transport Unit
- PCM Interface
- Clock Frequencies
- GPIO Port
- PWM
- Triac Control/PWM
- Serial Peripheral Interface
- Power Management Unit
- Electrical Characteristics
- RF Specifications
- Timing and AC Characteristics
- Environmental Specifications
- Regulatory Information
- Packaging
- Ordering Information
- Acronyms
- Document Conventions
- Document History Page
- Sales, Solutions, and Legal Information
Document Number: 002-19525 Rev. ** Page 11 of 49
PRELIMINARY
CYBT-343026-01
CYBT-343029-01
CYBT-143038-01
Connections and Optional External Components
Power Connections (VDDIN)
The CYBT-X430XX-01 contains one power supply connection, VDDIN. VDDIN accepts a supply input range of 2.3 V to 3.6 V for
CYBT-34302X-01 and 1.62 V to 3.6 V for the CYBT-143038-01. Tabl e 1 2 provides this specification. The maximum power supply
ripple for this power connection is 100 mV, as shown in Table 12.
It is not required to place any power supply decoupling or noise reduction circuitry on the host PCB. If desired, an external ferrite bead
between the supply and the module connection can be included, but is not necessary. If used, the ferrite bead should be positioned
as close as possible to the module pin connection and the recommended ferrite bead value is 330Ω, 100 MHz.
External Reset (XRES)
The CYBT-X430XX-01 has an integrated power-on reset circuit which completely resets all circuits to a known power on state. This
action can also be envoked by an external reset signal, forcing it into a power-on reset state. The XRES signal is an active-low signal,
which is an input to the CYBT-X430XX-01 module (solder pad 3). The CYBT-X430XX-01 module
does not require an external pull-up
resistor on the XRES input
During power on operation, the XRES connection to the CYBT-X430XX-01 is required to be held low 50 ms after the VDD power
supply input to the module is stable. This can be accomplished in the following ways:
n The host device should connect a GPIO to the XRES of Cypress CYBT-X430XX-01 module and pull XRES low until VDD is stable.
XRES is recommended to be released 50 ms after VDDIN is stable.
n The XRES release timing may be controlled by a external voltage detection circuit. XRES should be released 50 ms after VDD is
stable.
Refer to Figure 10 on page 17 for XRES operating and timing requirements during power on events.
Multiple-Bonded GPIO Connections
The CYBT-X430XX-01 contains GPIO which are multiple-bonded at the silicon level. If any of these dual-bonded GPIO are used, only
the functionality and features for one of these port pins may be used. The desired port pin should be configured in the WICED Studio
SDK. For details on the features and functions that each of these multiple-bonded GPIO provide, please refer to Table 4 and Table 5.
Using CYBT-143038-01 with External Flash
The CYBT-143038-01 does not contain any on-module non-volatile memory. If desired, the CYBT-143038-01 can be used with an
external memory device (SFLASH).
If EEPROM is used as an external memory device with I2C interface, module solder pads 4 (SDA) and 2 (SCL) must be used as the
I2C interface.
If using external SFLASH as the memory interface, SPI2 (master) must be used as the interface to the SFLASH device. The specific
GPIO required and the applicable SPI signal is shown below. These are the same signals used for SFLASH interface on the
CYBT-343026-01.
1. SPI signal MOSI: Module Solder Pad 9, silicon connection SPI2_MOSI_I2C_SDA
2. SPI signal MISO: Module Solder Pad 8, silicon connection SPI2_MISO_I2C_SCL
3. SPI Signal CLK: Module Solder Pad 10 silicon connection SPI2_CLK
4. SPI Signal CS: Module Solder Pad 6, silicon connection SPI2_CSN