User's Manual
Table Of Contents
- General Description
- Benefits
- More Information
- Overview
- Pad Connection Interface
- Recommended Host PCB Layout
- Module Connections
- Connections and Optional External Components
- Bluetooth Baseband Core
- Microprocessor Unit
- Integrated Radio Transceiver
- Collaborative Coexistence
- Global Coexistence Interface
- Peripheral Transport Unit
- PCM Interface
- Clock Frequencies
- GPIO Port
- PWM
- Triac Control/PWM
- Serial Peripheral Interface
- Power Management Unit
- Electrical Characteristics
- RF Specifications
- Timing and AC Characteristics
- Environmental Specifications
- Regulatory Information
- Packaging
- Ordering Information
- Acronyms
- Document Conventions
- Document History Page
- Sales, Solutions, and Legal Information
Document Number: 002-19525 Rev. ** Page 19 of 49
PRELIMINARY
CYBT-343026-01
CYBT-343029-01
CYBT-143038-01
Internal LDO
The microprocessor in CYBT-X430XX-01 uses two LDOs - one for 1.2V and the other for 2.5V. The 1.2V LDO provides power to the
baseband and radio and the 2.5V LDO powers the PA.
Collaborative Coexistence
The CYBT-X430XX-01 provides extensions and collaborative coexistence to the standard Bluetooth AFH for direct communication
with WLAN devices. Collaborative coexistence enables WLAN and Bluetooth to operate simultaneously in a single device. The device
supports industry-standard coexistence signaling, including 802.15.2, and supports Cypress and third-party WLAN solutions.
Global Coexistence Interface
The CYBT-X430XX-01 supports the proprietary Cypress Global Coexistence Interface (GCI) which is a 2-wire interface.
The following key features are associated with the interface:
n Enhanced coexistence data can be exchanged over GCI_SECI_IN and GCI_SECI_OUT a two-wire interface, one serial input
(GCI_SECI_IN), and one serial output (GCI_SECI_OUT). The pad configuration registers must be programmed to choose the digital
I/O pins that serve the GCI_SECI_IN and GCI_SECI_OUT function.
n It supports generic UART communication between WLAN and Bluetooth devices.
n To conserve power, it is disabled when inactive.
n It supports automatic resynchronization upon waking from sleep mode.
n It supports a baud rate of up to 4 Mbps.
SECI I/O
The microprocessor in CYBT-X430XX-01 have dedicated GCI_SECI_IN and GCI_SECI_OUT pins. The two pin functions can be
mapped to the folloiwng connections on the Cypress module:
n GCI_SECI_IN: Module pad
Cypress Global Coexistence Interface (GCI) GPIO (Pad 4/5/6/7) . Pin function mapping is controlled by the configuration file that is
stored in either NVRAM or downloaded directly into on-chip RAM from the host.
Peripheral Transport Unit
Cypress Serial Communications Interface
The CYBT-X430XX-01 provides a 2-pin master BSC interface, which can be used to retrieve configuration information from an external
EEPROM or to communicate with peripherals such as track-ball or touch-pad modules, and motion tracking ICs used in mouse
devices. The BSC interface is compatible with I
2
C slave devices. The BSC does not support multimaster capability or flexible wait-state
insertion by either master or slave devices.
The following transfer clock rates are supported by the BSC:
n 100 kHz
n 400 kHz
n 800 kHz (not a standard I
2
C-compatible speed.)
n 1 MHz (Compatibility with high-speed I
2
C-compatible devices is not guaranteed.)
n The following transfer types are supported by the BSC:
n Read (Up to 127 bytes can be read.)
n Write (Up to 127 bytes can be written.)
n Read-then-Write (Up to 127 bytes can be read and up to 127 bytes can be written.)
n Write-then-Read (Up to127 bytes can be written and up to 127 bytes can be read.)
Hardware controls the transfers, requiring minimal firmware setup and supervision.
The clock pad (I2C_SCL) and data pad 2 (I2C_SDA) are both open-drain I/O pins. Pull-up resistors external to the CYBT-X430XX-01
are required on both the SCL and SDA pad for proper operation.