User's Manual

Table Of Contents
Document Number: 002-19525 Rev. ** Page 22 of 49
PRELIMINARY
CYBT-343026-01
CYBT-343029-01
CYBT-143038-01
GPIO Port
The CYBT-X430XX-01 has 24 general-purpose I/Os (GPIOs). All GPIOs support programmable pull-ups and are capable of driving
up to 8 mA at 3.3V or 4 mA at 1.8V, except chip P26, P27, P28, and P29, which are capable of driving up to 16 mA at 3.3V or 8 mA
at 1.8V.
The Following GPIOs on the module pads are available:
n PAD 11 GPIO_0: GPIO_0/P36/P38 (triple bonded; only one of three is available)
n PAD 12 GPIO_1: GPIO_1/P25/P32 (triple bonded; only one of three is available)
n PAD 22 GPIO_3: GPIO_3/P27/P33 (triple bonded; only one of three is available)
n PAD 14 GPIO_4: GPIO_4/LPO_IN/P6/P31 (quadruple bonded; only of four is available)
n PAD 23 GPIO_6: GPIO_6/P11/P26 (triple bonded; only one of three is available)
n PAD 19 GPIO_7: GPIO_7/P30 (Dual bonded; only one of two is available)
n PAD 15 P4/P24: BT_CLK_REQ/P4/P24 (triple bonded; only one of three is available)
n PAD 4 I2C_SDA: I2S_PCM_IN/P12 (dual bonded; only one of two is available)
n PAD 2 I2C_SCL: I2S_PCM_OUT/P3/P29/P35 (quadruple bonded; only one of four is available)
n PAD 5 P2/P37/P28: I2S_PCM_CLK/P2/P28/P37 (quadruple bonded; only one of four is available)
n PAD 1 P0/34: I2S_WS_PCM_SYNC/P0/P34 (triple bonded; only on
All of these pins can be programmed as ADC inputs.
Port 26–Port 29 in PAD 23/PAD 22/PAD 5/PAD 2
P[26:29] in PAD 23/PAD 22/PAD 5/PAD 2 consists of four pins. All pins are capable of sinking up to 16 mA for LEDs. These pins also
have PWM functionality, which can be used for LED dimming.
For a description of the capabilities of all GPIOs, see Tab le 4 and Tab le 5
.
PWM
The CYBT-X430XX-01 has four PWMs. The PWM module consists of the following:
n PWM0-3
n The following GPIOs can be mapped as PWMs, module pad shown in [ ]:
p P26 on P12/P26 [Pad 5]
p P27 on P11/P27 [Pad 4]
p P14 on P14/P38 [Pad 7]
p P13 on P13/P28 [Pad 8]
n PWM1-4: Each of the four PWM channels contains the following registers:
p 10-bit initial value register (read/write)
p 10-bit toggle register (read/write)
p 10-bit PWM counter value register (read)
n PWM configuration register shared among PWM1-4 (read/write). This 12-bit register is used:
p To configure each PWM channel
p To select the clock of each PWM channel
p To change the phase of each PWM channel
Figure 11 shows the structure of one PWM.