User's Manual
Table Of Contents
- General Description
- Benefits
- More Information
- Overview
- Pad Connection Interface
- Recommended Host PCB Layout
- Module Connections
- Connections and Optional External Components
- Bluetooth Baseband Core
- Microprocessor Unit
- Integrated Radio Transceiver
- Collaborative Coexistence
- Global Coexistence Interface
- Peripheral Transport Unit
- PCM Interface
- Clock Frequencies
- GPIO Port
- PWM
- Triac Control/PWM
- Serial Peripheral Interface
- Power Management Unit
- Electrical Characteristics
- RF Specifications
- Timing and AC Characteristics
- Environmental Specifications
- Regulatory Information
- Packaging
- Ordering Information
- Acronyms
- Document Conventions
- Document History Page
- Sales, Solutions, and Legal Information
Document Number: 002-19525 Rev. ** Page 34 of 49
PRELIMINARY
CYBT-343026-01
CYBT-343029-01
CYBT-143038-01
PCM Interface Timing
Short Frame Sync, Master Mode
Figure 16. PCM Timing Diagram (Short Frame Sync, Master Mode)
Table 23. PCM Interface Timing Specifications (Short Frame Sync, Master Mode)
Reference Characteristics Minimum Typical Maximum Unit
1 PCM bit clock frequency – – 20.0 MHz
2 PCM bit clock LOW 20.0 – – ns
3 PCM bit clock HIGH 20.0 – – ns
4 PCM_SYNC delay 0 – 5.7 ns
5 PCM_OUT delay –0.4 – 5.6 ns
6 PCM_IN setup 16.9 – – ns
7 PCM_IN hold 25.0 – – ns
8
Delay from rising edge of PCM_BCLK during last bit period
to PCM_OUT becoming high impedance
–0.4 – 5.6 ns