Specifications

Document Number: 002-29354 Rev. ** Page 22 of 45
PRELIMINARY
CYBT-273063-02
CYBT-263064-02
CYBT-263065-02
I
2
S Interface
The CYBT-2X30XX-02 supports a single I
2
S digital audio port. with both master and slave modes. The I
2
S signals are:
■ I
2
S Clock: I
2
S SCK
■ I
2
S Word Select: I
2
S WS
■ I
2
S Data Out: I
2
S DO
■ I
2
S Data In: I
2
S DI
I
2
S SCK and I
2
S WS become outputs in master mode and inputs in slave mode, while I
2
S DO always stays as an output. The channel
word length is 16 bits and the data is justified so that the MSN of the left-channel data is aligned with the MSB of the I
2
S bus, per I
2
S
Specifications. The MSB of each data word is transmitted one bit clock cycle after the I
2
S WS transition, synchronous with the falling
edge of bit clock. Left Channel data is transmitted when I
2
S WS is low, and right-channel data is transmitted when I
2
S WS is high.
Data bits sent by the CYBT-2X30XX-02 are synchronized with the falling edge of I
2
S SCK and should be sampled by the receiver on
the rising edge of the I
2
S SCK.
The clock rate in master mode is either one of the following:
■ 32 kHz × 32 bits per frame = 1024 kHz
■ 32 kHz × 50 bits per frame = 1600 kHz
The master clock is generated from the reference clock using an N/M clock divider. In the slave mode, any clock rate is supported up
to a maximum of 3.072 MHz.
Note: The PCM interface shares HW with the I
2
S interface and only one can be used at a given time.
PCM Interface
The CYBT-2X30XX-02 includes a PCM interface that can connect to linear PCM codec devices in master or slave mode. In master
mode, the CYBT-2X30XX-02 generates the PCM_CLK and PCM_SYNC signals. In slave mode, these signals are provided by another
master on the PCM interface and are inputs to the CYBT-2X30XX-02.The configuration of the PCM interface may be adjusted by the
host through the use of vendor-specific HCI commands.
Note: The PCM interface shares HW with the I
2
S interface and only one can be used at a given time.
Note: Only audio source (other than SCO) use cases are supported on 20819 at this time.
Slot Mapping
The CYBT-2X30XX-02 supports up to three simultaneous full-duplex channels through the PCM Interface. These three channels are
time-multiplexed onto the single PCM interface by using a time-slotting scheme where the 8 kHz or 16 kHz audio sample interval is
divided into as many as 16 slots. The number of slots is dependent on the selected interface rate (128 kHz, 512 kHz, or 1024 kHz).
The corresponding number of slots for these interface rates is 1, 2, 4, 8, and 16, respectively. The PCM data output driver tristates its
output on unused slots to allow other devices to share the same PCM interface signals. The data output driver tristates its output after
the falling edge of the PCM clock during the last bit of the slot.
Frame Synchronization
The CYBT-2X30XX-02 supports both short- and long-frame synchronization in both master and slave modes. In short frame synchro-
nization mode, the frame synchronization signal is an active-high pulse at the audio frame rate that is a single-bit period in width and
is synchronized to the rising edge of the bit clock. The PCGM slave looks for a high on the falling edge of the bit clock and expects
the first bit of the first slot to start at the next rising edge of the clock. In long-frame synchronization mode, the frame synchronization
signal is again an active-high pulse at the audio frame rate; however, the duration is three bit periods and the pulse starts coincident
with the first bit of the first slot.
Data Formatting
The CYBT-2X30XX-02 may be configured to generate and accept several different data formats. For conventional narrow band speech
mode, the CYBT-2X30XX-02 uses 13 of the 16 bits in each PCM frame. The location and order of these 13 bits can be configured to
support various data formats on the PCM interface. The remaining three bits are ignored on the input and may be filled with 0s, 1s, a
sign bit, or a programmed value on the output. The default format is 13-bit 2’s complement data, left justified, and clocked MSB first.