Data Sheet
Table Of Contents
- General description
- Module description
- Power consumption
- Functional capabilities
- Benefits
- More information
- References
- Development environments
- Technical support
- Contents
- 1 Overview
- 2 Pad connection interface
- 3 Recommended host PCB layout
- 4 Module connections
- 5 Connections and optional external components
- 6 Functional description
- 7 Integrated radio transceiver
- 8 Peripheral and communication interfaces
- 9 Keyboard scanner
- 10 Clock frequencies
- 11 GPIO port
- 12 PWM
- 13 Power management unit
- 14 Electrical characteristics
- 15 Chipset RF specifications
- 16 Timing and AC characteristics
- 17 Environmental specifications
- 18 Regulatory information
- 19 Packaging
- 20 Ordering information
- 21 Acronyms
- 22 Document conventions
- Revision History
Preliminary Datasheet 26 of 58 002-33419 Rev. **
2021-07-22
AIROC™ Bluetooth® LE module
Peripheral and communication interfaces
Table 10 contains example values to generate common baud rates with a 48 MHz UART clock.
Normally, the UART baud rate is set by a configuration record downloaded after reset. Support for changing the
baud rate during normal HCI UART operation is included through a vendor-specific command that allows the host
to adjust the contents of the baud rate registers.
The CYBLE-3x307x-02 UART operates correctly with the host UART as long as the combined baud rate error of the
two devices is within ±2%.
8.3 Triac control
The CYBLE-3x307x-02 includes hardware support for zero-crossing detection and trigger control for up to four
triacs. The CYBLE-3x307x-02 detects zero-crossing on the AC zero detection line and uses that to provide a pulse
that is offset from the zero crossing. This allows the CYBLE-3x307x-02 to be used in dimmer applications, as well
as any other applications that require a control signal that is offset from an input event.
The zero-crossing hardware includes an option to suppress glitches.
8.4 Peripheral UART interface
The CYBLE-3x307x-02 has a second UART that may be used to interface to peripherals. This peripheral UART is
accessed through the optional I/O ports, which can be configured individually and separately for each functional
pin. The CYBLE-3x307x-02 can map the peripheral UART to any LHL GPIO. The peripheral UART clock is fixed at
24 MHz. Both TX and RX have a 256-byte FIFO (see Table 4 on page 14).
8.5 Serial peripheral interface
The CYBLE-3x307x-02 has two independent SPI interfaces, both of which support single, dual, and quad mode
SPI operations. Either interface can be a master or a slave. Each interface has a 64-byte transmit buffer and a
64-byte receive buffer. To support more flexibility for user applications, the CYBLE-3x307x-02 has optional I/O
ports that can be configured individually and separately for each functional pin. The CYBLE-3x307x-02 acts as an
115200 0x00 0x00 Normal 0.16
57600 0x00 0x00 Normal 0.16
38400 0x01 0x00 Normal 0.00
Table 10 Common baud rate examples, 48 MHz clock
Baud rate (bps) High rate Low rate Mode Error (%)
6M 0xFF 0xF8 High rate 0
4M 0xFF 0xF4 High rate 0
3M 0x0 0xFF Normal 0
2M 0x44 0xFF Normal 0
1.5M 0x0 0xFE Normal 0
1M 0x0 0xFD Normal 0
921600 0x22 0xFD Normal 0.16
230400 0x0 0xF3 Normal 0.16
115200 0x1 0xE6 Normal –0.08
57600 0x1 0xCC Normal 0.04
Table 9 Common baud rate examples, 24 MHz clock
(continued)
Baud rate (bps)
Baud rate adjustment
Mode Error (%)
High nibble Low nibble