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PRELIMINARY

CYBLE-214009-00

EZ-BLE

PSoC

Module

Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600

Document Number: 002-09714 Rev. **

Revised October 29, 2015

General Description

The Cypress CYBLE-214009-00 is a fully certified and qualified

module supporting Bluetooth



Low Energy (BLE) wireless

communication. The CYBLE-214009-00 is a turnkey solution

and includes onboard crystal oscillators, trace antenna, passive

components, and the Cypress PSoC

4 BLE. Refer to the

PSoC

4 BLE datasheet for additional details on the capabilities

of the PSoC

4 BLE device used on this module.

The EZ-BLE

PSoC

module is a scalable and reconfigurable

platform architecture. It combines programmable and

reconfigurable analog and digital blocks with flexible automatic

routing. The CYBLE-214009-00 also includes digital

programmable logic, high-performance analog-to-digital

conversion (ADC), opamps with comparator mode, and standard

communication and timing peripherals.

The CYBLE-214009-00 includes a royalty-free BLE stack

compatible with Bluetooth 4.1 and provides up to 25 GPIOs in a

small 11 × 11 × 1.80 mm package.

The CYBLE-214009-00 is a complete solution and an ideal fit for

applications seeking a highly integrated BLE wireless solution.

CYBLE-214009-00 is drop-in compatible CYBLE-014008-00.

Module Description

n Module size: 11.0 mm × 11.0 mm × 1.80 mm (with shield)

n Bluetooth 4.1 single-mode module

n Industrial temperature range: –40 °C to +85 °C

n 32-bit processor (0.9 DMIPS/MHz) with single-cycle 32-bit

multiply, operating at up to 48 MHz

n 256-KB flash memory, 32-KB SRAM memory

n Watchdog timer with dedicated internal low-speed oscillator

(ILO)

n Two-pin SWD for programming

n Up to 25 GPIOs configurable as open drain high/low,

pull-up/pull-down, HI-Z analog, HI-Z digial, or strong output

n Certified to FCC, CE, MIC, KC, and IC regulations

n Bluetooth SIG 4.1 qualified

Power Consumption

n TX output power: –18 dbm to +3 dbm

n Received signal strength indicator (RSSI) with 1-dB resolution

n TX current consumption of 15.6 mA (radio only, 0 dbm)

n RX current consumption of 16.4 mA (radio only)

n Low power mode support

p Deep Sleep: 1.3 µA with watch crystal oscillator (WCO) on

p Hibernate: 150 nA with SRAM retention

p Stop: 60 nA with XRES wakeup

Programmable Analog

n Four opamps with reconfigurable high-drive external and

high-bandwidth internal drive, comparator modes, and ADC

input buffering capability; can operate in Deep-Sleep mode.

n 12-bit, 1-Msps SAR ADC with differential and single-ended

modes; channel sequencer with signal averaging

n Two current DACs (IDACs) for general-purpose or capacitive

sensing applications on any pin

n One low-power comparator that operate in Deep-Sleep mode

Programmable Digital

n Four programmable logic blocks called universal digital blocks,

(UDBs), each with eight macrocells and datapath

n Cypress-provided peripheral Component library, user-defined

state machines, and Verilog input

Capacitive Sensing

n Cypress CapSense Sigma-Delta (CSD) provides best-in-class

SNR (> 5:1) and liquid tolerance

n Cypress-supplied software component makes

capacitive-sensing design easy

n Automatic hardware-tuning algorithm (SmartSense™)

Segment LCD Drive

n LCD drive supported on all GPIOs (common or segment)

n Operates in Deep-Sleep mode with four bits per pin memory

Serial Communication

n Two independent runtime reconfigurable serial communication

blocks (SCBs) with I

C, SPI, or UART functionality

Timing and Pulse-Width Modulation

n Four 16-bit timer, counter, pulse-width modulator (TCPWM)

blocks

n Center-aligned, Edge, and Pseudo-random modes

n Comparator-based triggering of Kill signals for motor drive and

other high-reliability digital logic applications

Up to 25 Programmable GPIOs

n Any GPIO pin can be CapSense, LCD, analog, or digital

n Two overvoltage-tolerant (OVT) pins; drive modes, strengths,

and slew rates are programmable

Summary of content (40 pages)

PAGE 1
CYBLE-214009-00 TM ® PRELIMINARY EZ-BLE PSoC Module General Description The Cypress CYBLE-214009-00 is a fully certified and qualified module supporting Bluetooth Low Energy (BLE) wireless communication. The CYBLE-214009-00 is a turnkey solution and includes onboard crystal oscillators, trace antenna, passive components, and the Cypress PSoC® 4 BLE. Refer to the PSoC® 4 BLE datasheet for additional details on the capabilities of the PSoC® 4 BLE device used on this module.
PAGE 2
PRELIMINARY CYBLE-214009-00 Contents Overview............................................................................ 3 Module Description...................................................... 3 Pad Connection Interface ................................................ 5 Recommended Host PCB Layout ................................... 6 Power Supply Connections and Recommended External Components.................................................................... 10 Connection Options...................
PAGE 3
CYBLE-214009-00 PRELIMINARY Overview Module Description The CYBLE-214009-00 module is a complete module designed to be soldered to the main host board. Module Dimensions and Drawing Cypress reserves the right to select components (including the appropriate BLE device) from various vendors to achieve the BLE module functionality. Such selections will guarantee that all height restrictions of the component area are maintained.
PAGE 4
CYBLE-214009-00 PRELIMINARY Figure 1. Module Mechanical Drawing Side View Top View Bottom View Note 1. No metal should be located beneath or above the antenna area. Only bare PCB material should be located beneath the antenna area. For more information on recommended host PCB layout, see Figure 3 and Figure 4 on page 6. Document Number: 002-09714 Rev.
PAGE 5
CYBLE-214009-00 PRELIMINARY Pad Connection Interface As shown in the bottom view of Figure 1 on page 4, the CYBLE-214009-00 connects to the host board via solder pads on the back of the module. Table 2 and Figure 2 detail the solder pad length, width, and pitch dimensions of the CYBLE-214009-00 module. Table 2. Solder Pad Connection Description Name SP Connections Connection Type 32 Solder Pads Pad Length Dimension Pad Width Dimension Pad Pitch Pad9/Pad24: 0.74 mm All Others: 0.79 mm 0.41 mm 0.
PAGE 6
PRELIMINARY CYBLE-214009-00 Recommended Host PCB Layout Figure 3 details the recommended PCB layout pattern for the host PCB. Dimensions are in mm. Figure 3. Recommended PCB Layout Pattern for CYBLE-214009-00 Top View (On Host PCB) To maximize RF performance, the host layout should follow these recommendations: 1. The ideal placement of the Cypress BLE module is in a corner of the host board with the antenna located on the edge of the host board.
PAGE 7
CYBLE-214009-00 PRELIMINARY Table 3 details the solder pad pitch (center-to-center) for each of the neighboring connections. Table 3. Module Solder Pad Connection Dimensions Pad X Pad Y Pad Pitch (Pad X - Pad Y) Comments Bottom Right Corner 1 4.83 mm Distance from bottom right corner to Pad 1 center 1 2 0.66 mm Distance from Pad 1 center to Pad 2 center 2 3 0.66 mm Distance from Pad 2 center to Pad 3 center 3 4 0.66 mm Distance from Pad 3 center to Pad 4 center 4 5 0.
PAGE 8
CYBLE-214009-00 PRELIMINARY Table 4 and Table 5 detail the solder pad connection definitions and available functions for each connection pad. Table 4 lists the solder pads on CYBLE-214009-00, the BLE device port-pin, and denotes whether the digital function shown is available for each solder pad. Table 5 denotes whether the analog function shown is available for each solder pad. Each connection is configurable for a single option shown with a 3. Table 4.
PAGE 9
CYBLE-214009-00 PRELIMINARY . Table 5. Analog Peripheral Capabilities Pad Number Device Port Pin 1 GND[3] 2 P1.1 3 P1.0 4 P1.5 5 P0.1 6 P0.7 7 VDD 8 P1.4 9 P0.4 10 P0.5 11 P0.6 12 P1.2 13 VDDR 14 P2.6 15 P1.3 16 P3.0 17 P2.1 18 P2.2 19 P2.3 20 VDDA 21 P3.4 22 P3.1 23 P3.7 24 P3.5 25 P3.3 26 VREF 27 P3.2 28 P3.6 29 XRES 30 P2.4 31 P2.5 32 GND Document Number: 002-09714 Rev.
PAGE 10
CYBLE-214009-00 PRELIMINARY Power Supply Connections and Recommended External Components Power Connections External Component Recommendation The CYBLE-214009-00 contains three power supply connections, VDD, VDDA, and VDDR. The VDD and VDDA connections supply power for the digital and analog device operation respectively. VDDR supplies power for the device radio. In either connection scenario, it is recommended to place an external ferrite bead between the supply and the module connection.
PAGE 11
PRELIMINARY CYBLE-214009-00 Figure 6. Recommended Host Schematic for an Independent Supply Option Document Number: 002-09714 Rev.
PAGE 12
PRELIMINARY CYBLE-214009-00 The CYBLE-214009-00 schematic is shown in Figure 7. Figure 7. CYBLE-214009-00 Schematic Diagram Document Number: 002-09714 Rev.
PAGE 13
CYBLE-214009-00 PRELIMINARY Critical Components List Table 6 details the critical components used in the CYBLE-214009-00 module. Table 6. Critical Component List Component Reference Designator Silicon U1 Description 76-pin WLCSP Programmable System-on-Chip (PSoC) with BLE Crystal Y1 24.000 MHz, 10PF Crystal Y2 32.768 kHz, 12.5PF Antenna Design Table 7 details antenna used on the CYBLE-214009-00 module. The Cypress module performance improves many of these characteristics.
PAGE 14
CYBLE-214009-00 PRELIMINARY Electrical Specification Table 8 details the absolute maximum electrical characteristics for the Cypress BLE module. Table 8. CYBLE-214009-00 Absolute Maximum Ratings Parameter Description Min Typ Max Units Details/Conditions VDDD_ABS VDD, VDDA or VDDR supply relative to VSS (VSSD = VSSA) –0.5 – 6 V Absolute maximum VCCD_ABS Direct digital core voltage input relative to VSSD –0.5 – 1.
PAGE 15
CYBLE-214009-00 PRELIMINARY Table 10. CYBLE-214009-00 DC Specifications (continued) Parameter IDD8 Description Execute from flash; CPU at 12 MHz Min Typ Max Units Details/Conditions – – – mA T = –40 °C to 85 °C IDD9 Execute from flash; CPU at 24 MHz – 7.1 – mA T = 25 °C, VDD = 3.3 V IDD10 Execute from flash; CPU at 24 MHz – – – mA T = –40 °C to 85 °C IDD11 Execute from flash; CPU at 48 MHz – 13.4 – mA T = 25 °C, VDD = 3.
PAGE 16
CYBLE-214009-00 PRELIMINARY Table 11. AC Specifications Parameter Description Min Typ Max Units DC – 48 MHz Wakeup from Sleep mode – 0 – µs Guaranteed by characterization TDEEPSLEEP Wakeup from Deep-Sleep mode – – 25 µs 24-MHz IMO. Guaranteed by characterization THIBERNATE Wakeup from Hibernate mode – – 800 µs Guaranteed by characterization TSTOP Wakeup from Stop mode – – 2 ms XRES wakeup FCPU CPU frequency TSLEEP Details/Conditions 1.71 V ≤ VDD ≤ 5.
PAGE 17
CYBLE-214009-00 PRELIMINARY Table 13. GPIO AC Specifications Parameter Description Min Typ Max Units Details/Conditions TRISEF Rise time in Fast-Strong mode 2 – 12 ns 3.3-V VDDD, CLOAD = 25 pF TFALLF Fall time in Fast-Strong mode 2 – 12 ns 3.3-V VDDD, CLOAD = 25 pF TRISES Rise time in Slow-Strong mode 10 – 60 ns 3.3-V VDDD, CLOAD = 25 pF TFALLS Fall time in Slow-Strong mode 10 – 60 ns 3.3-V VDDD, CLOAD = 25 pF FGPIOUT1 GPIO Fout; 3.3 V ≤ VDD ≤ 5.
PAGE 18
CYBLE-214009-00 PRELIMINARY Table 16. Opamp Specifications (continued) Parameter Description Min Typ Max Units IOUT_MAX_HI Power = high 10 – – mA IOUT_MAX_MID Power = medium 10 – – mA IOUT_MAX_LO Power = low – 5 – mA Details/ Conditions IOUT (VDDA = 1.71 V, 500 mV from Rail) IOUT_MAX_HI Power = high 4 – – mA IOUT_MAX_MID Power = medium 4 – – mA IOUT_MAX_LO Power = low – 2 – mA VIN Charge pump on, VDDA ≥ 2.7 V –0.05 – VDDA – 0.
PAGE 19
CYBLE-214009-00 PRELIMINARY Table 16. Opamp Specifications (continued) Parameter Description Min Typ Max Units – 20 – µV/°C Vos_dr_DS Offset voltage drift Vout_DS Output voltage 0.2 – VDD–0.2 V Vcm_DS Common mode voltage 0.2 – VDD–1.8 V Min Typ Max Units Details/ Conditions Table 17.
PAGE 20
CYBLE-214009-00 PRELIMINARY Table 20. SAR ADC DC Specifications A_CHNIS_S Number of channels - single-ended – – 8 8 full-speed A-CHNKS_D Number of channels - differential – – 4 Diff inputs use neighboring I/O A-MONO Monotonicity – – – A_GAINERR Gain error – – ±0.
PAGE 21
CYBLE-214009-00 PRELIMINARY CSD Block Specifications (continued) Parameter Description Min Typ Max Units IDAC1 DNL for 8-bit resolution –1 – 1 LSB IDAC1 INL for 8-bit resolution –3 – 3 LSB IDAC2 DNL for 7-bit resolution –1 – 1 LSB IDAC2 INL for 7-bit resolution –3 – 3 LSB SNR Ratio of counts of finger to noise 5 – – Ratio IDAC1_CRT1 Output current of IDAC1 (8 bits) in High range – 612 – µA IDAC1_CRT2 Output current of IDAC1 (8 bits) in Low range – 306 – µA ID
PAGE 22
CYBLE-214009-00 PRELIMINARY Table 25.
PAGE 23
CYBLE-214009-00 PRELIMINARY Serial Communication Table 30. Fixed I2C DC Specifications Parameter Description II2C1 Block current consumption at 100 kHz II2C2 Block current consumption at 400 kHz II2C3 Block current consumption at 1 Mbps 2 I C enabled in Deep-Sleep mode II2C4 Min Typ Max Units Details/Conditions – – 50 µA – – – 155 µA – – – 390 µA – – – 1.4 µA – Min Typ Max Units Details/Conditions – – 400 kHz Table 31.
PAGE 24
CYBLE-214009-00 PRELIMINARY Memory Table 38. Flash DC Specifications Parameter Description Min Typ Max Units Details/Conditions 1.71 – 5.5 V – Number of Wait states at 32–48 MHz 2 – – CPU execution from flash Number of Wait states at 16–32 MHz 1 – – CPU execution from flash Number of Wait states for 0–16 MHz 0 – – CPU execution from flash Min Typ Max VPE Erase and program voltage TWS48 TWS32 TWS16 Table 39.
PAGE 25
CYBLE-214009-00 PRELIMINARY Voltage Monitors (LVD) Table 44. Voltage Monitor DC Specifications Parameter VLVI1 Description LVI_A/D_SEL[3:0] = 0000b Min 1.71 Typ 1.75 Max 1.79 Units V Details/Conditions – VLVI2 LVI_A/D_SEL[3:0] = 0001b 1.76 1.80 1.85 V – VLVI3 LVI_A/D_SEL[3:0] = 0010b 1.85 1.90 1.95 V – VLVI4 LVI_A/D_SEL[3:0] = 0011b 1.95 2.00 2.05 V – VLVI5 LVI_A/D_SEL[3:0] = 0100b 2.05 2.10 2.15 V – VLVI6 LVI_A/D_SEL[3:0] = 0101b 2.15 2.20 2.
PAGE 26
CYBLE-214009-00 PRELIMINARY Internal Main Oscillator Table 47. IMO DC Specifications Parameter Description Min Typ Max Units Details/Conditions IIMO1 IMO operating current at 48 MHz – – 1000 µA – IIMO2 IMO operating current at 24 MHz – – 325 µA – IIMO3 IMO operating current at 12 MHz – – 225 µA – IIMO4 IMO operating current at 6 MHz – – 180 µA – IIMO5 IMO operating current at 3 MHz – – 150 µA – Table 48.
PAGE 27
CYBLE-214009-00 PRELIMINARY Table 53.
PAGE 28
CYBLE-214009-00 PRELIMINARY Table 53. BLE Subsystem (continued) Parameter RXSE2 Description Receiver spurious emission 1.0 GHz to 12.75 GHz Min Typ Max Units – – –47 dBm Details/ Conditions 1-MHz measurement bandwidth ETSI EN300 328 V1.8.
PAGE 29
CYBLE-214009-00 PRELIMINARY Table 53. BLE Subsystem (continued) Parameter Description Min Typ Max Units ITX,-12dBm TX current at –12-dBm setting (PA2) – 13.2 – mA ITX,-18dBm TX current at –18-dBm setting (PA1) – 12.5 – mA Iavg_1sec, 0dBm Average current at 1-second BLE connection interval – 17.1 – µA Iavg_4sec, 0dBm Average current at 4-second BLE connection interval – 6.1 – µA 2400 – 2482 MHz Details/ Conditions TXP: 0 dBm; ±20-ppm master and slave clock accuracy.
PAGE 30
CYBLE-214009-00 PRELIMINARY Environmental Specifications Environmental Compliance This Cypress BLE module is built in compliance with the Restriction of Hazardous Substances (RoHS) and Halogen Free (HF) directives. The Cypress module and components used to produce this module are RoHS and HF compliant.
PAGE 31
PRELIMINARY CYBLE-214009-00 Regulatory Information FCC FCC NOTICE: The device CYBLE-214009-00 complies with Part 15 of the FCC Rules. The device meets the requirements for modular transmitter approval as detailed in FCC public Notice DA00-1407. Transmitter Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference received, including interference that may cause undesired operation.
PAGE 32
PRELIMINARY CYBLE-214009-00 Industry Canada (IC) Certification CYBLE-214009-00 is licensed to meet the regulatory requirements of Industry Canada (IC), License: IC: 7922A-4008 Manufacturers of mobile, fixed or portable devices incorporating this module are advised to clarify any regulatory questions and ensure compliance for SAR and/or RF exposure limits. Users can obtain Canadian information on RF exposure and compliance from www.ic.gc.ca.
PAGE 33
PRELIMINARY CYBLE-214009-00 MIC Japan CYBLE-214009-00 is certified as a module with type certification number TBD. End products that integrate CYBLE-214009-00 do not need additional MIC Japan certification for the end product. End product can display the certification label of the embedded module. KC Korea CYBLE-214009-00 is certified for use in Korea with certificate number MSIP-CRM-Cyp-4008 Document Number: 002-09714 Rev.
PAGE 34
CYBLE-214009-00 PRELIMINARY Ordering Information The CYBLE-214009-00 part number and features are listed in the following table.
PAGE 35
CYBLE-214009-00 PRELIMINARY Acronyms Table 55. Acronyms Used in this Document Acronym Description ABUS analog local bus ADC analog-to-digital converter AG analog global AHB AMBA (advanced microcontroller bus architecture) high-performance bus, an ARM data transfer bus Table 55.
PAGE 36
CYBLE-214009-00 PRELIMINARY Table 55. Acronyms Used in this Document (continued) Acronym Description Table 55. Acronyms Used in this Document (continued) Acronym Description MAC multiply-accumulate SDA I2C serial data MCU microcontroller unit S/H sample and hold MIC Ministry of Internal Affairs and Communications (Japan) SINAD signal to noise and distortion ratio MISO master-in slave-out SIO special input/output, GPIO with advanced features. See GPIO.
PAGE 37
PRELIMINARY CYBLE-214009-00 Document Conventions Units of Measure Table 56.
PAGE 38
PRELIMINARY CYBLE-214009-00 Errata This section describes the errata for the CYBLE-214009-00 module. Details include errata trigger conditions, scope of impact, and available workarounds. Contact your local Cypress Sales Representative if you have questions. Errata Summary 1. CapSense is not enabled in PSoC Creator. n PROBLEM DEFINITION n CapSense Support for CYBLE-214009-00 is not enabled in PSoC Creator 3.3.
PAGE 39
PRELIMINARY CYBLE-214009-00 Document History Page Document Title: CYBLE-214009-00 EZ-BLETM PSoC® Module Document Number: 002-09714 Revision ** ECN Orig. of Change DSO Submission Date Description of Change 10/29/2015 Preliminary datasheet for CYBLE-214009-00 module. Document Number: 002-09714 Rev.
PAGE 40
PRELIMINARY CYBLE-214009-00 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. PSoC® Solutions Products Automotive Clocks & Buffers Interface Lighting & Power Control Memory cypress.com/go/automotive cypress.com/go/clocks cypress.com/go/interface cypress.com/go/powerpsoc cypress.