Datasheet

CY8CMBR3002, CY8CMBR3102
CY8CMBR3106S, CY8CMBR3108
CY8CMBR3110, CY8CMBR3116 Datasheet
Document Number: 001-85330 Rev. *G Page 19 of 37
Power Supply Information
The CY8CMBR3xxx family of controllers contains three supply
domains: V
DD
, V
CC
, and V
DDIO
.
■ V
DD
: This is the primary supply to the chip and can be powered
from 1.8 V ±5% or 1.8 to 5.5 V. The CapSense controller is
powered by the V
DD
supply, and all the I/O signal levels (except
I
2
C lines, HI, and XRES) are referenced with respect to the V
DD
supply. For packages and MPNs that do not have V
DDIO
, the
I
2
C SDA, I
2
C SCL, HI, and XRES signal levels are also refer-
enced with respect to the V
DD
supply.
■ V
DDIO
: This is the supply input for I
2
C SDA, I
2
C SCL, HI, and
XRES
lines. The signal levels of these I/Os are referenced with
respect to V
DDIO
. The V
DDIO
supply can be as low as 1.71 V
and as high as the voltage of the V
DD
supply. The V
DDIO
should
not be powered at a voltage higher than that of the V
DD
supply.
The V
DDIO
is available only on select packages. For a package
that does not have V
DDIO
, the I
2
C SDA, I
2
C SCL, HI, and XRES
signal levels are referenced with respect to the V
DD
supply.
■ V
CC
: This is the internal regulator output, which powers the
core and capacitive sensing circuits. A 0.1-µF, 5-V ceramic
capacitor should be connected close to the V
CC
pin for better
performance.
■ Power sequencing: The CY8CMBR3xxx device does not
require any power supply sequencing for the VDD and VDDIO
supplies. Either of these supplies can ramp earlier or later than
the other. The only requirement is that VDDIO should not be
greater than VDD.
■ 1.8-V externally regulated operation: When V
DD
is powered
with a 1.8 V ±5% supply, the V
CC
and V
DD
pins should be
shorted externally and the SUPPLY_LOW_POWER bit in the
DEVICE_CFG3 register should be set to 1 through the I
2
C
interface (refer to the CY8CMBR3xxx Registers TRM for details
on the register). When the VCC and VDD pins are shorted, this
bypasses the internal voltage regulator. Under this condition,
make certain that VDD does not exceed 1.89 V.
Note: If EZ-Click is used to configure the device, it automatically
takes care of the required register settings based on the voltage
settings selected in EZ-Click.
The CY8CMBR3xxx family of controllers is factory-configured for
1.8-V to 5.5-V operation. To configure a factory-configured
device for 1.8-V externally regulated operation, you can use the
following procedure:
■ Short V
DD
and V
CC
.
■ Power the device at 1.8 V (note that regardless of the value of
the SUPPLY_LOW_POWER bit, the device can be powered at
1.8 V for configuring the device; only CapSense operation is
not guaranteed if the SUPPLY_LOW_POWER bit is not
properly configured)
■ Use EZ-Click to configure the device for 1.8-V operation.
■ Save and reset the device.
■ Ground consideration: Both the V
SS
pin and the metal pad
(E-pad) of the device should be connected to board ground.
Figure 14. Power Supply Connections for CY8CMBR3xxx CapSense Controllers
[10]
*SUPPLY_LOW_POWERbitinDEVICE_CFG3registershouldbesetto1
tooperatedeviceat1.8V(±5%)
CY8CMBR3xxx
V
DD
V
DDIO
V
SS
1.71 V < V
DDIO
< V
DD
1.8 V to 5.5 V
1
μF
0.1
μF
V
CC
0.1 μF
CY8CMBR3xxx
V
DD
V
DDIO
V
SS
1.71 V < V
DDIO
< V
DD
1.71 V to 1.89 V
0.1
μF
V
CC
1 μF
Power supply connections when 1.8 < V
DD
< 5.5 V Power supply connections* when 1.71 < V
DD
< 1.89 V
0.1 μF 0.1 μF
1 μF1 μF
Note
10. Proper ground layout is important for best performance. Refer to the layout guidelines mentioned in the CY8CMBR3xxx CapSense Design Guide and Getting started
with CapSense guide.