Datasheet

24 PSoC Designer IDE Guide, Document # 001-42655 Rev *B
Chip-Level Editor
CLKOUT Source
Selects one of the clocks, internal SysClk, external, low power 32 KHz, or CPUCLK to be output
directly on port P0[1].
CPU_Clock
The CPU_Clock selection allows the selection of the M8C clock speed from 93.75 kHz to 24 MHz.
The CPU clock is derived directly from the SysClock. Use an external 32 kHz oscillator and the PLL
Ext_Lock to improve clock accuracy. A discussion of the main oscillator is contained in the PSoC
Technical Reference Manual.
Crystal OSC
Selects the external crystal oscillator when enabled. The external crystal oscillator shares pads
CLKIN and CLKOUT with two GPIOs; P0.0 and P0.1, respectively.
Crystal OSC Xgm
XGM is the amplifier transconductance setting and selects the calibration for the external crystal
oscillator.
EFTB
The external crystal oscillator is passed through the EFTB filter when this option is enabled.
FreeRun Timer and Free Run Timer/N
Selects clock source for 16-bit free-running timer. The free-running timer generates an interrupt at a
1024-µs rate. It can also generate an interrupt when counter overflow occurs at every 16.384 ms.
The combination of the FreeRun Timer and the FreeRun Timer divider are used to obtain the
FreeRun Timer rate.
Low V Detect
Selects the level of the supply voltage at which the low voltage detect interrupt is generated.
LVD ThrottleBack
This parameter allows you to configure the PSoC to lower its own CPU clock speed under low volt-
age conditions. Use of this parameter and the bit it controls is discussed in the PSoC Technical Ref-
erence Manual. Not all PSoC devices incorporate this parameter and bit.
Opamp Bias
Performance of the internal opamps are tailored based upon the application under development by
selecting high or low bias conditions for the analog section of the PSoC. Selecting high bias causes
the opamp to consume more current but also increases its bandwidth and switching speed, lowering
its output impedance. To estimate the current (and power) consumption per opamp block, including
the effect from high or low selection of opamp Bias, refer to the applicable table in the data sheet for
the part: DC Operation Amplifier Specifications (ISOA). To estimate the effect on AC opamp parame-
ters, refer to the applicable AC Operational Amplifier Specifications in the device data sheet.
PLL_Mode
The PSoC Technical Reference Manual discusses use of the phase-locked loop mode.