Datasheet

50 PSoC Designer IDE Guide, Document # 001-42655 Rev *B
Chip-Level Editor
 4 Analog Columns
 VC3
 GPIO
 16 Digital Blocks
 I2C
 Sleep Timer
The configurable interrupts include 16 digital blocks and 4 analog columns. The definition (for exam-
ple, interrupt vector action) of a configurable interrupt depends on the user module that occupies the
block or uses the analog column.
The Chip-Level Editor handles the details of getting user module parameters into source code, so
that the project is configured correctly at startup and exposes subroutines that make for ease-of-use.
Exposing subroutines that make user module parameters easy to use involves PSoC Designer add-
ing files to your project. These files are known as Application Program Interfaces (APIs). Typically,
one of these user module files, added to your project, is an interrupt handler.
Aside from adding API files to your project, the Chip-Level Editor also inserts a call or jump to the
user module’s interrupt handler in the startup source file, boot.asm.
2.12.2 Interrupt Vectors and the Chip-Level Editor
Figure 2-42 shows an example of how an interrupt handler is dispatched in the interrupt vector table,
using a device from the CY8C27xxx part family. Shown below is the Timer32 User Module mapped
to PSoC blocks 00, 01, 02, and 03. An interrupt is generated by the hardware when terminal count is
reached. The last PSoC Block (or MSB byte) of Timer32 generates the terminal count interrupt.
Figure 2-42. Timer32 on Four Digital PSoC Blocks