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Document Number: 001-13258 Rev. *J Revised September 28, 2012

C Bootloader Datasheet BootLdrI2C V 2.40

001-13258 Rev. *J

I2C Bootloader

Features and Overview

 Industry standard Philips I

C-bus compatible interface

 Enables you to reprogram a PSoC device using the I

C system bus instead of in-system programming

pins

The BootLdrI2C User Module implements a bootloader that can reprogram the PSoC device over the I

interface. The PSoC device already gives an in-system serial programming interface (ISSP) that allows

downloading new code into the device. However, the bootloader allows a code update to occur through an

industry standard communication interface, such as I

C. This user module can be useful for any device

that has to be reprogrammed in the field. The bootloading information can be sent through an I

C master

device, such as a CY3240 (USB to I

C bridge) or an in-system host processor.

The I

C bootloader requires the I

C Hardware User Module. It does not preclude the use of the I

C bus for

other functions within the PSoC device. The I

C bootloader uses a separate I

C address for its associated

functions. All of the code for the I

C bootloader is programmed in a protected area of EEPROM and

cannot be accidentally overwritten.

Resources

PSoC

Blocks API Memory (Bytes)

Pins (per

External I/O)

Digital Analog CT Analog SC Flash RAM

CY7C603xx, CY7C64215, CY8C21x12, CY8C21x45, CY8C22x45, CY8C23x33, CY8C24x9x, CY8C28x43,

CY8C28x52, CY8C29/27/24/21x3x, CY8CPLC20, CY8CLED04/08/16, CY8CLED0xD, CY8CLED0xG,

CY8CLED16P01, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8C20x24,

CY8C20x34

Slave (full API support) 0 0 0 2560 6-128 2

Slave (no API support) 0 0 0 2144 6-128 2

Summary of content (39 pages)

PAGE 2
I2C Bootloader Figure 1. I2C Block Diagram Quick Start 1. Review this user module datasheet. A successful implementation of a bootloader project requires an understanding of this information. 2. Add the user module to a project. 3. Place the user module, selecting either I2C for Bootloader Only or Full I2C API Support with Bootloader. 4. In the menu bar, open Project > Settings dialog box and click OK to save project parameters. 5. Right-click the user module icon and select Boot Loader Tools. 6.
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I2C Bootloader Functional Description The bootloader is located in a section of Flash memory defined by you (using user module parameters). This memory space is (must be) write-protected to prevent any accidental modification or corruption. The reset vector is modified so that when the processor is reset, the bootloader is executed. The following operations are carried out by the bootloader: 1.
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I2C Bootloader Theory of Operation Creating a project with a bootloader requires several nonstandard modifications to the PSoC Designer standard model. To facilitate this, the BootLdrI2C User Module gives customized files and specialized tools to assist you in bootloader project development. The special tools are accessed by switching to the Device Editor view and right-clicking the BootLdrI2C User Module icon.
PAGE 5
I2C Bootloader The first is blocks 0 and 1 of ROM. These blocks contain critical interrupt vectors and restart vectors. Because it is nearly impossible to control read access to these blocks by any operating device, they are never erased and reprogrammed. The first two blocks of ROM must not be modified and cannot be placed in any other location. The second memory area is the relocatable interrupt table.
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I2C Bootloader (which is created with the application). If the two checksums are equal, the bootloader utility allows the foreground application to execute. If the two checksums are not equal, the bootloader enters a wait loop for a host application to download a valid application. It also enables its own I2C subsystem to allow the host to transmit data. When the host system observes this interface enabled, it may choose to execute its own set of applications.
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I2C Bootloader Generate Checksum – After your project builds correctly, you can use the bootloader tools to create and autovalidate checksums. When the bootloader tools selection screen is accessed, the project code is generated and a complete compile of the entire project is executed. Next, a checksum calculation is performed on the resulting hex file, which is compared to a checksum stored by the user module. If the checksums do not match, a message is displayed.
PAGE 8
I2C Bootloader allows the linker to place code automatically and can be helpful in determining application code size requirements. HTLinkOpts.lkp – When source generation takes place, the HTLinkOpts.lkp file is populated with autogenerated ROM areas for major code blocks as defined in the user module parameters. Do not modify the code blocks in the HTLinkOpts.lkp file: -L-ACODE... & -L-AROM... Lines contain data giving the overall ROM size. -L-PPD_startup...
PAGE 9
I2C Bootloader To translate from Blocks to absolute addresses, multiply: Abs_addr = block_number X Block Size. Block_0 starts at addr 0, Block_n starts at address n x Block_size. All blocks are delimited in hex for the bootloader parameters, so a hex address can be obtained by multiplying by 0x40 (64-byte blocks) or 0x80 (128-byte blocks). Hex output files contain an absolute address for each line.
PAGE 10
I2C Bootloader Parameters and Resources Default parameters are for informational purposes only. Defaults in your project may be tailored to the block size of the part in use, or may have been adjusted to give adequate sizes of code areas. After your project is compiled and tested, you can adjust block sizes to optimize memory use. Figure 3. Default Parameters Figure 3 shows the default user module parameters.
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I2C Bootloader from 0x00-0x7F. Because this is the upper 7 bits of the address, the actual address appears to be doubled inside the code. Boot_Loader_Addr_HEX Selects the 7-bit slave address that is used by the I2C master to address the I2C BootLoader slave device. Valid selections are from 0 - 7Fh. Because this is the upper 7 bits of the address, the actual address appears to be doubled inside the code. The parameter value must differ from the Slave_Addr_HEX parameter value.
PAGE 12
I2C Bootloader Specifies the range of CPU clock speeds under which a CY8C27xxx silicon revision A device operates. The CY8C27xA refers to the older CY27xxx devices that are no longer recommended for new designs. In the PSoC Designer device catalog, the CY8C27x silicon revision A are at the bottom of the catalog and are preceded with a “Not Recommended for New Designs" notice. They can be differentiated from the new version in that the new versions of the parts have the letter ‘X’ in the part name.
PAGE 13
I2C Bootloader at colder temperatures. Bootloading at significantly lower temperatures than the parameter setting may result in reduced memory retention. For this reason, you must take precautions to ensure that the bootloader is never operated more than 20°C from the value in this parameter. See the Cypress device specification for more information. Ignore_N_I2C_Prefix_Bytes Note The RS-232 to I2C translator project sends 2 prefix bytes to the device.
PAGE 14
I2C Bootloader Common Problems Updating Bootloader Projects, Service Pack Upgrades, and Compilers Avoid changes to the PSoC Developer environment when using a bootloader application. This includes not updating PSoC Designer, not updating the BootLdrI2C User Module, and not changing the compiler. The reason behind this is that initially the bootloader and application are compiled together, but after a bootloadable system is deployed, only the application section is reprogrammed.
PAGE 15
I2C Bootloader For development and debugging purposes, a flash security of 'U' (unprotected) is recommended for the application area. For final production, a flash security setting of 'R' (read protected) is recommended on the application area to prevent external reads and writes from occurring. Incorrect Relocatable Code Start Address (Linker Parameter ImageCraft Compiler Only) The memory map for a bootloader project is considerably different than that for a conventional project.
PAGE 16
I2C Bootloader from a watch dog timer reset condition, it is possible to monitor a status bit associated with the watchdog timer to detect that this is the cause of the reset condition (see the Technical Reference Manual). 5. Two projects have been developed and the bootloader in each is different in some subtle way. Remember that bootloading implies that programming part of a device is taking place.
PAGE 17
I2C Bootloader ENTER_BOOTLOADER Description: Routine to completely setup the bootloader and prepare to download a new application program. After this routine is called, it does not return unless a timeout or reset occurs. The GenericBootloaderEntry function name is always located at the same physical ROM address, so that an application compiled at a later date can still use this function call to enter the bootloader. All three of these routines represent the same address vector.
PAGE 18
I2C Bootloader C Prototype: void BL_SetTemp (CHAR cTemp); Assembler: mov A, cTemp lcall BL_SetTemp Example Code: void main(void) { CHAR cDieTemp = -20; // Allocate a variable to hold the die temperature // Use -20C as the default value ... // Measure die temperature here and copy to cDieTemp variable BL_SetTemp(cDieTemp); // Update Bootloader with real die temperature ENTER_BOOTLOADER(); // Run the BootLoader ... } Parameters: cTemp: Die Temperature in Celsius degrees.
PAGE 19
I2C Bootloader BootLdrI2C_DisableInt Description: Disables the I2C slave by disabling the SDA interrupt. Performs the same action as I2Cs_Stop. C Prototype: void BootLdrI2C_DisableInt(void); Assembler: lcall BootLdrI2C_DisableInt Parameters: None Return Value: None Side Effects: The A and X registers may be modified by this or future implementations of this function. This is true for all RAM page pointer registers in the Large Memory Model (CY8C29xxx).
PAGE 20
I2C Bootloader BootLdrI2C_Poll() and BootLdrI2C_BootLdr_Poll() Description: Used when the Communication_ Service_Type parameter is set to Polled. This function gives a user controlled entry into the I/O processing routine. If Communication_Service_Type parameter is set to Interrupt, the function does nothing.
PAGE 21
I2C Bootloader BootLdrI2C_Stop Description: Disables the I2CHW by disabling the I2C interrupt. C Prototype: void BootLdrI2C_Stop(void); Assembler: lcall BootLdrI2C_Stop Parameters: None Return Value: None Side Effects: The A and X registers may be modified by this or future implementations of this function. This is true for all RAM page pointer registers in the Large Memory Model (CY8C29xxx).
PAGE 22
I2C Bootloader BootLdrI2C_DisableSlave Description: Disables the I2C Slave function by clearing the Enable Slave bit in the I2C_CFG register. C Prototype: void BootLdrI2C_DisableSlave(void); Assembler: lcall BootLdrI2C_DisableSlave Parameters: None Return Value: None Side Effects: The A and X registers may be modified by this or future implementations of this function. This is true for all RAM page pointer registers in the Large Memory Model (CY8C29xxx).
PAGE 23
I2C Bootloader BootLdrI2C_InitRamRead Description: The BootLdrI2C_InitRamRead routine initializes a data buffer pointer for the slave to use to retrieve data from, and zeroes the value of a count byte for the same buffer. C Prototype: void BootLdrI2C_InitRamRead(BYTE * pBootLdrI2C_ReadBuf, BYTE BootLdrI2C_Read_Count); Assembler: mov A, Read_Count push A move A, >pReadBuf push A mov A,
PAGE 24
I2C Bootloader Return Value: None Side Effects: The A and X registers may be modified by this or future implementations of this function. This is true for all RAM page pointer registers in the Large Memory Model (CY8C29xxx). When necessary, it is the calling function's responsibility to preserve the values across calls to fastcall16 functions. Read status bits are cleared. BootLdrI2C_bReadI2CStatus Description: Returns the value in the I2CStatus variable.
PAGE 25
I2C Bootloader BootLdrI2C_ClrRdStatus Description: Clears the status bits in the Control/Status register, but does not alter buffer addresses, counts, or the Flash/Ram Read bit. C Prototype: void BootLdrI2C_ClrRdStatus(void); Assembler: lcall BootLdrI2C_ClrRdStatus Parameters: None. Return Value: None Side Effects: The A and X registers may be modified by this or future implementations of this function. This is true for all RAM page pointer registers in the Large Memory Model (CY8C29xxx).
PAGE 26
I2C Bootloader Sample Firmware Source Code Configure the user module parameters as shown in Figure 5, for both the assembly language and C examples. Figure 5. User Module Parameters Ensure that the code start address is set correctly. Figure 6. Setting Code Start Address Document Number: 001-13258 Rev.
PAGE 27
I2C Bootloader Here is an implementation of an BootLdrI2C User Module written in C: //---------------------------------------------------------------------// C main line //---------------------------------------------------------------------#include #include "PSoCAPI.
PAGE 28
I2C Bootloader asm("nop"); } } Here is an implementation of the BootLdrI2C User Module written in assembly language: ;--------------------------------------------------------------------; Assembly main line ;--------------------------------------------------------------------include "m8c.inc" include "memory.inc" include "PSoCAPI.
PAGE 29
I2C Bootloader Configuration Registers This section describes the PSoC Resource Registers used or modified by the BootLdrI2C User Module. Table 1. Resource I2C_CFG: Bank 0 reg[D6] Configuration Register Bit Value 7 Reserved 6 PinSelect 5 Bus Error IE 4 Stop IE 3 Clock Rate[1] 2 Clock Rate[0] 1 0 Enable Master Enable Slave Pin Select: Selects either SCL and SDA as P1[5]/P1[7] or P1[0]/P1[1]. Bus Error Interrupt Enable: Enable I2C interrupt generation on a Bus Error.
PAGE 30
I2C Bootloader Received or Transmitted data. To transmit data, this register must be loaded before a write to the I2C_SCR register. Received data is read from this register. It may contain an address or data. Table 4. Resource I2C_MSCR: Bank 0 reg[D9] Master Status Control Register Bit Value 7 Reserved 6 Reserved 5 Reserved 4 Reserved 3 Bus Busy 2 Master Mode 1 Restart Gen 0 Start Gen Bus Busy: Master Only, set when any bus Start condition is detected, cleared when a Stop condition is detected.
PAGE 31
I2C Bootloader 4. Connect the CY3240 USBtoIIC bridge to the target system. Use the GUI to set the power to the required level. This power can be used to supply power to the target depending on the power requirements of the target system. The status bar at the bottom of the GUI must indicate that the bridge is connected and powered. In addition, ensure that the “Send all strings" box is checked at the bottom of the USBtoIIC GUI to send the entire download file.
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I2C Bootloader Bootloader I2C Download (.dld file) Format This section briefly discusses the format of the file .dld: Two sample download records are shown in the following figures – the first, third, and the last. These records consist of actual data that would be transmitted between the I2C master and a slave to be bootloaded. The format of the records is described in this section. Figure 7. Sample Record Figure 8 shows the format of the first record: Figure 8.
PAGE 33
I2C Bootloader Table 5. Slave Address Read Responses Code Meaning 0x20 Bootload mode (Success). Received 'Enter bootloader' command with valid bootLoader Key. 0x02 Image verify error. The checksum of application and relocatable interrupt vector areas calculated by the bootloader does not match the checksum received from the Host. 0x04 Flash checksum error. The flash block content does not match the data received from Host. 0x08 Flash protection error.
PAGE 34
I2C Bootloader The next three lines contain only the control byte, the I2C prefix, and 16 bytes of data. The last line of the write block command contains the control byte, the I2C prefix, the final 12 bytes of data, and two 1-byte checksums. The first checksum, 0x9A in this example, is the checksum of the data bytes for this record. The second checksum, 0x8A in this example, is the checksum of the entire 77 byte record, excluding address bytes and prefixes.
PAGE 35
I2C Bootloader Figure 10 shows the last download record: Figure 10. Last Download Record The last line is a final status request and possibly a response. When the exit bootloader command is received, the target system immediately executes an internal reset and begins verifying the checksum for the downloaded application. This is done using the parameters given in the checksum block.
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I2C Bootloader Code Area (see Bootloader Memory Organization for information). This ensures that the E2PROM blocks are not part of the Application Code Area, and are not calculated as part of the Application checksum. Document Number: 001-13258 Rev.
PAGE 37
I2C Bootloader Figure 11. BootloaderI2C User Module Operation Flowchart Document Number: 001-13258 Rev.
PAGE 38
I2C Bootloader Version History Version Originator Description 1.2 DHA Added Version History 2.00 DHA 1. Reorganized the memory map. 2. Placed Reloc Interrupt Vectors Table at address 0x0080. 3. Placed Checksum Block at address 0x0100. 4. Placed Bootloader Start at address 0x0140. 5. Added SetTemperature() function. 6. Added Bootloader API Jump Table. 7. Updated user module Parameters table. 2.10 DHA 1. Replaced .Literal and .EndLiteral statement with .nocc around the SSC call. 2.
PAGE 39
I2C Bootloader Note PSoC Designer 5.1 introduces a Version History in all user module datasheets. This section documents high level descriptions of the differences between the current and previous user module versions. Document Number: 001-13258 Rev. *J Revised September 28, 2012 Page 39 of 39 Copyright © 2007-2012 Cypress Semiconductor Corporation. The information contained herein is subject to change without notice.