Datasheet

I2C Bootloader
Document Number: 001-13258 Rev. *J Page 11 of 39
from 0x00-0x7F. Because this is the upper 7 bits of the address, the actual address appears to be
doubled inside the code.
Boot_Loader_Addr_HEX
Selects the 7-bit slave address that is used by the I2C master to address the I2C BootLoader slave
device. Valid selections are from 0 - 7Fh. Because this is the upper 7 bits of the address, the actual
address appears to be doubled inside the code. The parameter value must differ from the
Slave_Addr_HEX parameter value.
Read_Buffer_Types
Selects what types of buffers are supported for data reads. Two selections are available: RAM ONLY
or RAM OR FLASH. Selection of RAM ONLY removes code and variables required to support direct
Flash-ROM reads. Select RAM OR FLASH to give code and variable support for reading either RAM
buffers or Flash-ROM buffers to transmit data to the master. Select RAM OR FLASH to enable
support for API calls to select whether a RAM- or Flash-read buffer is used.
Communication_Service_Type
This parameter enables you to select between an interrupt based data processing strategy and a
polled strategy. In the interrupt based strategy, a transfer is initiated against a predefined buffer. Data
is then moved in or out of the buffer as quickly as possible in the background. An ISR routine is
included which handles data movement. When you select the polled data processing strategy, you
are in control of when data movement takes place. To implement a polled strategy, you must period-
ically call the function BootLdrI2C_Poll() (see the I2C.h files for the exact instance name). Each time
the polling function is called, a single byte is transferred. Other I
2
C functions are used identically. The
polled communication strategy may be used in a situation where interrupt latency is critically important
(and asynchronous communication interrupts may cause problems). Another use is when you want
absolute control of when data is transferred. A drawback of polling is that when the I
2
C state machine
is enabled, the bus is stalled automatically after each byte until the polling function is called.
The polling function is available only for the Slave and MultiMasterSlave implementations of I
2
C. The
Single Master implementation offers API functions to support byte-wise data transfers.
Using the polling function from an interrupt is not recommended. The definition of a timed interrupt to
call the poll function may call the function so often that no other data processing can take place. The
poll service is not re-entrant and the function cannot be called until it completes its processing.
I2C Clock
Specifies the desired clock speed at which to run the I
2
C interface. There are three I2C_Clock speeds
available:
 50K Standard
 100K Standard
 400K Fast (when CPU_Clk_speed is greater than 6 MHz)
I2C_Pin
Selects the pins from Port 1 to be used for I
2
C signals. PSoC Designer automatically selects the
proper drive mode for these pins. Note that all pins on Port 1 other than SCL, SDA and the optional
interrupt pin are set to HI-Z analog mode during bootloading.
CPU_Clk_speed_(CY8C27xA)
Note This parameter is available only for parts in the CY8C27xxx family.