Data Sheet
Table Of Contents
- CYBT-213066-02, CYBT-213067-02, EZ-BT Module
- General Description
- Benefits
- More Information
- Contents
- Overview
- Pad Connection Interface
- Recommended Host PCB Layout
- Module Connections
- Connections and Optional External Components
- Critical Components List
- Antenna Design
- Bluetooth Baseband Core
- Power Management Unit
- Integrated Radio Transceiver
- Microcontroller Unit
- Peripherals and Communication Interfaces
- Electrical Characteristics
- Chipset RF Specifications
- Timing and AC Characteristics
- Environmental Specifications
- Regulatory Information
- Packaging
- Ordering Information
- Acronyms
- Document Conventions
- Document History Page
- Sales, Solutions, and Legal Information
Document Number: 002-30628 Rev. ** Page 32 of 46
PRELIMINARY
CYBT-213066-02
CYBT-213067-02
SPI Timing
The SPI interface can be clocked up to 24 MHz.
Table 25 and Figure 14 show the timing requirements when operating in SPI Mode 0 and 2.
Figure 14. SPI Timing, Mode 0 and 2
Table 25. SPI Mode 0 and 2
Reference Characteristics Min. Max. Unit
1 Time from master assert SPI_CSN to first clock edge 45 –
ns2 Setup time for MOSI data lines 6 ¾
SCK
3 Idle time between subsequent SPI transactions 1 SCK –