Specifications

Document Number: 002-30672 Rev. ** Page 12 of 46
PRELIMINARY
CYBT-243068-02
CYBT-243069-02
Connections and Optional External Components
Power Connections (VDD)
The CYBT-243068-02/CYBT-243069-02 contains one power supply connection, VDD. VDD accepts a supply input of 2.6 V to 3.3 V.
Table 12 provides this specification. The maximum power supply ripple for this power connection is 100 mV, as shown in Table 12.
External Reset (XRES)
The CYBT-243068-02/CYBT-243069-02 has an integrated power-on reset circuit which completely resets all circuits to a known
power-on state. This action can also be invoked by an external reset signal, forcing it into a power-on reset state. XRES is an active-low
input signal on the CYBT-243068-02/CYBT-243069-02 module (solder pad 3). The CYBT-243068-02/CYBT-243069-02 does not
require external pull-up resistors on the XRES input. Refer to Figure 10 on page 17 for Power On and XRES operation and timing
requirements during power on events.
HCI UART Connections
The recommendations in this section apply to the HCI UART (Solder Pads 28, 29, 30, and 31). For full UART functionality, all UART
signals must be connected to the Host device. If full UART functionality is not being used, and only UART RXD and TXD are desired
or capable, then the following connection considerations should be followed for UART RTS and CTS:
■ UART RTS: Can be left floating, pulled low, or pulled high. RTS is not critical for initial firmware uploading at power on.
■ UART CTS: Must be pulled low to bypass flow control and to ensure that continuous data transfers are made from the host to the
module.
External Component Recommendation
Power Supply Circuitry
It is not required to place any power supply decoupling or noise reduction circuitry on the host PCB. If desired, an external ferrite bead
between the supply and the module connection can be included. The ferrite bead should be positioned as close as possible to the
module pad connection.
If used, the recommended ferrite bead value is 330 Ω, 100 MHz. (Murata BLM21PG331SN1D).
Figure 8 illustrates the CYBT-243068-02/CYBT-243069-02 schematic.
PDM Input Microphone 1 ~ 2
PDM Input Channel 1
PDM Input Channel 2
PWM Output Pulse Width Modulator 1 ~ 6
PWM Channel 0
PWM Channel 1
PWM Channel 2
PWM Channel 3
PWM Channel 4
PWM Channel 5
Table 5. GPIO SuperMux Input and Output Functions (continued)
Function Input or Output Function Type
GPIOs
Required
Function Connection Description