Specifications

Document Number: 002-30672 Rev. ** Page 26 of 46
PRELIMINARY
CYBT-243068-02
CYBT-243069-02
PA LDO
PSRR
C
OUT
= 2.2 µF, 1.235 V ≤ V
IN
≤ 1.4 V, V
OUT
= 1.2 V,
I
OUT
= 20 mA
f = 1 kHz
f = 100 kHz
25
13
––
dB
dB
Table 17. RF LDO (continued)
Parameter Conditions Min Typ Max Unit
Note
5. Minimum values represent minimums after derating due to tolerance, temperature, and voltage effect.
Table 18. PALDO
Parameter Conditions Min. Typ. Max. Unit
Input Supply, PALDO_VDDIN
VDDIN min must be greater than V
OUT
+100mV under max
load current for proper regulation
2.6 3.3 3.3 V
Output Voltage,
PALDO_VDDOUT
Range 1.5 2.45 3.0 V
Step 100 mV
Accuracy -4 – +4 %
HTOL Output Voltage –3.3– V
Dropout Voltage At max load current – – 100 mV
Output Current DC Load 0 30 60 mA
Quiescent Current At T ≤ 85 °C, V
IN
= 3.3 V – – 110 μA
Output Load Capacitor, C
OUT
1.2
[5]
2.2 – μF
Line Regulation 2.7 V ≤ V
IN
≤ 3.63 V, V
OUT
= 2.5 V – – 25 mV/V
Load Regulation V
IN
= 3.3 V, V
OUT
= 2.5V, 0mA ≤ I
OUT
≤ 30 mA – – 1 mV/mA
Load Step Error
I
OUT
step 1 mA↔20 mA @ 1μs rise/fall, C
OUT
= 2.2 μF,
V
IN
= 3.3 V, V
OUT
= 2.5 V
-25 – 25 mV
Leakage Current
Power-down mode, V
IN
= 3.6 V, Temp = 25 °C––1.6μA
Power-down mode, V
IN
= 3.6 V, Temp = 125 °C––4.9μA
In-rush Current C
OUT
= 2.2 μF, V
IN
= 3.3 V, V
OUT
= 2.5 V – – 140 mA
LDO Turn On Time C
OUT
= 2.2 μF, V
IN
= 3.3 V, V
OUT
= 2.5 V, I
OUT
= 20 mA – – 140 μs
PSRR
C
OUT
= 2.2 μF, V
IN
= 3.3 V, V
OUT
= 2.5 V, I
OUT
= 20 mA
45 – – dB
f
= 1 kHz
f
= 100 kHz 25 – – dB