CY8C20xx6A/H CapSense® Design Guide Doc. No. 001-65973 Rev. *A Cypress Semiconductor 198 Champion Court San Jose, CA 95134-1709 Phone (USA): 880.858.1810 Phone (Intnl): 408.943.2600 http://www.cypress.
Copyrights © Cypress Semiconductor Corporation, 2010-2011. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights.
Contents 1. Introduction.................................................................................................................................................................... 6 1.1 1.2 1.3 1.4 2. CapSense Technology .................................................................................................................................................. 8 2.1 2.2 3. How to Use This Document ...........................................................................................
3.5 3.6 3.7 4. CapSense Performance Tuning with User Module ................................................................................................... 26 4.1 4.2 4.3 4.4 5. CSD User Module Low-Level Parameters ........................................................................................................... 21 3.5.1 iDAC Value ............................................................................................................................................. 21 3.5.
.3 5.4 5.5 5.6 5.7 6. Design Considerations ............................................................................................................................................... 47 6.1 6.2 7. Electromagnetic Compatibility (EMC) Considerations ......................................................................................... 42 5.3.1 Radiated Interference ............................................................................................................................. 42 5.
1. Introduction 1.1 How to Use This Document This document provides design guidance for the CapSense CY8C20XX6A/H family of devices. It is intended for design engineers who are familiar with capacitive sensing technology and have chosen this specific family of devices for their applications. For a thorough treatment of CapSense technology, including in-depth discussions of theory of operation and complete product offering detail, refer to Getting Started with CapSense. 1.
1.3 Document Revision History Revision Issue Date Origin of Change Description of Change ** 12/14/2010 ANBA New Design Guide *A 3/4/2011 BVI Multiple chapter enhancements for content and reader clarity 1.4 Document Conventions Convention Usage Courier New Displays file locations, user entered text, and source code: C:\ ...cd\icc\ Italics Displays file names and reference documentation: Read about the sourcefile.hex file in the PSoC Designer User Guide.
2. CapSense Technology 2.1 CapSense Equivalent Model Figure 2-1. CapSense System Equivalent Model The capacitance measured by the CapSense controller is named C X . When a finger is not on the sensor, C X equals the parasitic capacitance of the system, C P. When a finger touches the sensor surface, it forms a simple parallel plate capacitor through the overlay with the sensor pad. The result is called finger capacitance, C F , and can be defined by the following equation.
Figure 2-2. C MOD Configuration 2.2.1 Capacitance Conversion The CapSense algorithm converts the sensor capacitance into a digital count, called raw count. The raw count is interpreted as either a TOUCH or NO TOUCH state for the sensor. The numerical value of the raw count is the digital representation of the sensor capacitance. The sensitivity of a CapSense sensor is normally specified in units of counts-per-pF. Figure 2-3. Output of Sensing Algorithm CY8C20xx6A/H CapSense Design Guide Doc. No.
2.2.2 CapSense with Sigma Delta Modulator (CSD) Cypress’s CSD method uses a switched-capacitor circuit on the front end of the system to convert the sensor capacitance to an equivalent resistor, as shown in Equation 3. A Sigma-Delta modulator converts the current measured through the resistor into a digital count. When a finger is on the sensor, the capacitance increases and the equivalent resistance decreases.
2.2.3 CapSense Successive Approximation Electromagnetic Compatible (CSA_EMC) Cypress’s CSA_EMC method also uses a switched-capacitor circuit on the front end of the system to convert the sensor capacitance to an equivalent resistor. An internal constant current source called the iDAC is calibrated with a successive approximation procedure until a preset voltage develops across the equivalent resistor. This baseline voltage is measured using a single-slope ADC.
2.2.4 SmartSense™ Auto-Tuning Tuning the touch sensing user interface is a critical step in ensuring proper system operation and a pleasant user experience. The typical design flow entails tuning the sensor interface in the initial design phase, during system integration, and finally production fine-tuning before the production ramp. Tuning is an iterative process and can be time consuming. SmartSense Auto-Tuning was developed to simplify the user interface development cycle.
Figure 2-10. Typical Capacitive Interface Design Cycle Comparison Typical capacitive user interface Design Cycle Feasibility Study Mechanical Design Schematics Design Re-tuning for any changes Production Fine Tuning PCB Layout Design System Integration Design Validation CY8C20xx6A/H CapSense Design Guide Review Firmware Development SmartSense based capacitive user interface Design Cycle Feasibility Study Tuning process Production Doc. No. 001-65973 Rev.
3. CapSense Design Tools 3.1 Overview Cypress offers a full line of hardware and software tools for developing your CapSense capacitive touch sense application. A basic development system for the CY8C20xx6A/H family includes the following components. See Resources for ordering information. 3.1.1 PSoC Designer and User Modules Cypress’s exclusive integrated design environment, PSoC Designer, allows you to configure analog and digital blocks, develop firmware, and tune and debug your design.
3.1.1.1 Getting Started with CapSense User Modules To create a new CY8C20xx6A/H project in PSoC Designer: 1. Select and place the CSD/CSA_EMC/SmartSense User Module. 2. Right click the user module to access the User Module Wizard. 3. Set button sensor count, slider configuration, pin assignments, and associations. 4. Set pins and global user module parameters. 5. Generate the application and switch to Application Editor. 6.
3.2 User Module Overview Figure 3-3. User Module Block Diagram User modules contain an entire CapSense system, from physical sensing to data processing. The behavior of the user module is defined using a variety of parameters. These parameters affect different parts of the sensing system and can be separated into low-level and high-level parameters. The parameters communicate with one another using global arrays.
3.3 CapSense User Module Global Arrays Before studying CapSense User Module parameters, you need to know certain global arrays used by the CapSense system to ensure proper detection and operation in spite of environmental changes. These arrays should not be altered manually, but may be inspected for debugging purposes. Figure 3-4. Global Parameters 3.3.1 Raw Count The CapSense controller hardware measures the capacitance and provides the result in a digital form called Raw Count.
3.3.3 Difference Count The difference count is the difference between the raw count and the baseline of the sensor. Usually, the difference count is zero when the sensor is inactive. When the sensor is touched, it causes the raw count to increase, and results in a positive difference count value. Baseline values are stored in an integer array named UMname_waSnsDiff[] where UMname is CSD, SmartSense, or CSA_EMC. 3.3.
The SetDefaultFingerThresholds() function is used to set the thresholds to the default value set in the Device Editor. Possible values are 5 to 255. 3.4.2 Hysteresis The Hysteresis parameter is used in conjunction with the finger threshold to determine sensor state, as defined in Equation 4. Hysteresis adds immunity to noisy transitions. This is a debounce feature of a button. The touch state stays off until the difference counts are a little higher than the finger threshold.
3.4.6 Negative Noise Threshold The Negative Noise Threshold parameter acts as a negative difference count threshold. If the raw count is below the baseline minus the negative noise threshold for the number of samples specified by the Low Baseline Reset parameter, the baseline is set to the new raw count value. Possible values are 0 to 255. 3.4.7 Low Baseline Reset The Low Baseline Reset parameter works together with the Negative Noise Threshold parameter.
3.5 CSD User Module Low-Level Parameters The CSD User Module has several low-level parameters in addition to the high-level parameters. These parameters are specific to the CSD sensing method and determine how raw count data is acquired from the sensor. Figure 3-7. PSoC Designer - CSD Parameters WIndow 3.5.1 iDAC Value The iDAC parameter sets the capacitance measurement range. A higher value corresponds to a wider range.
Table 3-1. Resolution and Scan Speed Scan Speed (µs) Resolution Ultra Fast Fast Normal Slow 9 57 78 125 205 10 78 125 205 380 11 125 205 380 720 12 205 380 720 1400 13 380 720 1400 2800 14 720 1400 2800 5600 15 1400 2800 5600 11000 16 2800 5600 11000 22000 3.5.3 Scanning Speed This parameter sets sensor scanning speed.
Autocalibration consumes ROM and RAM resources and increases start time. Autocalibration does not automatically select the iDAC Range value. If the Raw Count value after calibration is less than half of the resolution range, you should increase the iDAC Range or reduce the precharge frequency. Autocalibration works to improve marginally functional configurations. 3.5.9 iDAC Range The iDAC Range parameter scales the iDAC current output.
3.6.1 Settling Time The Settling Time parameter controls the software delay that allows the voltage on the C MOD capacitor to stabilize. Each loop has nine CPU cycles per iteration. Select a settling Time based on Equation 5. 𝑆𝑒𝑡𝑡𝑙𝑖𝑛𝑔 𝑇𝑖𝑚𝑒 ≥ 10 × 𝑅𝑠𝑒𝑟𝑖𝑒𝑠 × 𝐶𝑃 Equation 5 Where: R series = 400-Ω + series resistor placed between port pin and sensor (typical value 560 Ω) C P = sensor base capacitance Possible values are 2 to 255. 3.6.
3.7 SmartSense User Module Parameters Figure 3-9. PSoC Designer SmartSense Parameters 3.7.1 Shield Electrode Out A shield electrode is used to reduce parasitic capacitance. This parameter selects where to route the output of the shield electrode. Possible values are P0[7] or P1[2]. 3.7.2 Sensor Sensitivity This parameter is used to increase and decrease the sensitivity of a sensor. Possible values are 0.1 pF, 0.2 pF, 0.3 pF, and 0.4 pF 3.7.
4. CapSense Performance Tuning with User Modules Optimal user module parameter settings depend on board layout, button dimensions, overlay material, and application requirements. These factors are discussed in Design Considerations. Tuning is the process of identifying the optimal parameter settings for robust and reliable sensor operation. 4.1 General Considerations 4.1.1 Signal, Noise, and SNR A well-tuned CapSense system reliably discriminates between ON and OFF sensor states.
4.1.1.2 CapSense Noise CapSense noise is the peak-to-peak variation in sensor response when a finger is not present, as demonstrated in Figure 4-2. In this example, the output waveform without a finger is bounded by a minimum of 5912 counts and a maximum of 5938 counts. The noise is the difference between the min and the max values of this waveform, so Noise = 5938 – 5912 = 26 counts. Figure 4-2. Example of CapSense Noise 4.1.1.3 CapSense SNR CapSense SNR is the simple ratio of signal and noise.
Figure 4-3. Charge/Discharge Waveforms Vs Tsmin >= 10*Rx*Cx Vdd Vx Rx Vref Vs Vx Cx 5*Rx*Cx 5*Rx*Cx t Vdd Vref t Set the charge/discharge rate to a level that is compatible with this RC time constant. The rule of thumb is to allow a period of 5RC for each transition, with two transitions per period (one charge, one discharge).
4.2 Tuning the CSA_EMC User Module Manual selection of iDAC settings is not required for the CSA_EMC User Module; they are adjusted automatically. However, monitoring the iDAC settings can be useful for debugging or statistical process control. 4.2.1 Clock and Settling Time The first step in tuning CSA_EMC User Module is to determine the settings for the clock and settling time. Figure 4-4 outlines the steps required to set these parameters. Figure 4-4.
4.2.1.1 Measure iDAC Gain After following the steps to create a new PSoC Designer Project, use the following code snippet to route iDAC to port pin P1[0]: //configure P1[0] to HI-Z PRT1DM0 &= ~0x01; PRT1DM1 |= 0x01; //connect P1[0] to analog mux bus MUX_CR1 |= 0x01; // set iDAC to full scale IDAC_D = 0xFF; // turn iDAC on, 4x range CS_CR2 = 0x90; Place a current meter between pin P1[0] and ground, and measure current, I MEASURED . Calculate the iDAC gain using Equation 8.
4.2.2 C MOD After the Clock and Settling Time are set, select the C MOD value. Figure 4-5 outlines the steps for this part of the tuning process. If you need to adjust the C MOD value, clock and settling time must be retuned, as described in Figure 4-4. Figure 4-5. Determining CSA_EMC C MOD Value Begin Initial Setting CMOD = 1 nF No SNR > 5 Increase CMOD No Reduce Noise with Filter Yes End Re-tune Clock and Settling Time 4.
Figure 4-6. Tuning the CSD User Module Start Set Shield Electrode Out according to needs of design High-Level API Parameters Hardware Parameters Measure Cp of sensors using EP64134 If max Cp < 45pF set Idac Range to 4X. Otherwise set to 8X.
Idac Range For projects where the maximum sensor C P is less than 45 pF, use 4X; otherwise, use 8X. Autocalibration Autocalibration should always be set to Enabled in CY8C20xx6A CSD designs. The ability of the autocalibration algorithm to successfully set the iDAC relies on the prescaler being set properly and that C MOD be of the recommended size. iDAC Value This parameter determines the current output of iDAC when autocalibration is disabled.
Resolution Available choices are 9 to 16 bits. Raising the resolution raises sensitivity, SNR, and noise immunity at the expense of scan time. The maximum raw count (full scale range) for scanning resolution n is 2n – 1. Table 4-2 provides recommended resolution settings based on C P and the finger capacitance C F . C F is the change in capacitance of a sensor when a finger is placed on the sensor. C F depends on overlay thickness, sensor size, and proximity of the sensor to other large conductors.
Table 4-3. Scan Time for a Single Sensor in цs Based on Resolution and Scanning Speed Scanning Speed Resolution (bits) Ultra Fast Fast Normal Slow 9 57 78 125 205 10 78 125 205 380 11 125 205 380 720 12 205 380 720 1400 13 380 720 1400 2800 14 720 1400 2800 5600 15 1400 2800 5600 11000 16 2800 5600 11000 22000 4.3.
4.3.
4.4.3 SmartSense User Module Parameters Only four parameters must be set for this user module. These are: Sensors Autoreset Debounce Modulator Capacitor Pin Shield Electrode Out 4.4.3.1 Sensors Autoreset This parameter determines whether the baseline is updated at all times or only when the signal difference is below the noise threshold. When set to Enabled the baseline is updated constantly.
Table 4-5. Sampling Time for a Sensor with IMO = 12 MHz Sensitivity = 0.2 pF C P (pF) ST (µs) Sensitivity = 0.3 pF C P (pF) Sensitivity = 0.4 pF ST(µs) C P (pF) ST (µs) 8 to 10 680 8 to 17 680 8 to 10 340 10 to 23 1360 17 to 35 1360 10 to 23 680 23 to 41 2730 35 to 41 2730 23 to 41 1360 41 to 45 5460 41 to 45 5460 41 to 45 2730 Table 4-6. Sampling Time for a Sensor with IMO = 6 MHz Sensitivity = 0.2 pF C P (pF) ST (µs) Sensitivity = 0.3 pF C P (pF) Sensitivity = 0.
SmartSense_ScanAllSensors(); SmartSense _UpdateAllBaselines(); } if(SmartSense _bIsAnySensorActive() ) { //1mS firmware routines } This means that, upon the activation of a CapSense sensor, firmware produces the sensor ON status within 7.35 ms (the sensor should be active for Debounce number of consecutive scans). This is often referred to as the response time of CapSense system.
SmartSense_Start(); SmartSense_ScanAllSensors(); SmartSense_SetDefaultFingerThresholds() ; Timer16_EnableInt(); Timer16_SetPeriod (TIMEOUT_10MS) ; Timer16_Start(); while( 1 ) { /* Scan all 3 sensors and update Baseline */ SmartSense_ScanAllSensors(); SmartSense_UpdateAllBaselines(); /* Wait till timer expires or sleep here */ while (bTimerTicks != 1) ; bTimerTicks = 0 ; if(CSDAUTO_bIsAnySensorActive() ) { //1 ms firmware routines } } } // Toggle Port_0[1] PRT0DR_Shadow ^= 0x01 ; PRT0DR = PRT0DR_Shadow ;
5. Design Considerations When designing capacitive touch sense technology into your application, it is crucial to keep in mind that the CapSense device exists within a larger framework. Careful attention to every level of detail from PCB layout to user interface to end-use operating environment will lead to robust and reliable system performance. For more in-depth information, refer Getting Started with CapSense. 5.
5.2 ESD Protection Robust ESD tolerance is a natural by-product of thoughtful system design. By considering how contact discharge will occur in your end product, particularly in your user interface, it is possible to withstand an 18-kV discharge event without incurring any damage to the CapSense controller. CapSense controller pins can withstand a direct 2-kV event. In most cases, the overlay material provides sufficient ESD protection for the controller pins.
Current Loop Area: Minimizes the return path for current. Hatched ground instead of solid fill should be provided within 1 cm of the sensors and traces to reduce the impact of parasitic capacitance. RF Source Location: Partition systems with noise sources such as LCD inverters and switched-mode power supplies (SMPS) to keep them separated from CapSense inputs. Shielding the power supply is another common technique for preventing interference. 5.3.
Table 5-4. RAM and Flash Requirements Filter Type Filter Order RAM (Bytes per sensor) Flash (Bytes) ImageCraft Compiler Flash (Bytes) ImageCraft Pro Compiler 2–8 6 675 665 1 2 429 412 2 6 767 622 Average IIR Median 3 6 516 450 5 10 516 450 Jitter filter on Raw Counts N/A 2 277 250 Jitter filter on slider centroid N/A 2 131 109 5.5 Power Consumption 5.5.1 System Design Recommendations For many designs, minimizing power consumption is an important goal.
5.5.4 Measuring Average Power Consumption The following instructions describe how to determine average power consumption when using the sleep-scan method: 1. Build a project that scans all of the sensors without going to sleep (continuous-scan mode). Include a pin-toggle feature in the code before scanning the sensors. Toggling the state of the output pin serves as a time marker that can be tracked with an oscilloscope. 2. Download the project to the CapSense device and measure the current consumption.
The architecture of the CapSense controller imposes a restriction on current budget for even and odd port pin numbers. An odd pin can be any port pin having an odd number as pin number. For a CapSense controller, if the current budget of odd port pin is 100 mA, total current drawn though all odd port pins should not exceed 100 mA. In addition to the total current budget limitation, there is also a maximum current limitation for each port pin that is defined in the CapSense controller datasheet.
6. Design Considerations Power consumption is an important aspect of microcontroller designs. Among the several techniques to reduce the average current used by PSoC, sleep mode is the most popular. PSoC uses sleep mode when it is not required to perform any function, similar to a cell phone backlight dimming after an idle period. This is done to reduce the average current consumed by the device, a necessity of all battery applications.
6.1.2 Putting it All Together The following code is a sample of a typical sleep preparation sequence for a 28-pin part. In this sequence, interrupts are disabled, the analog circuitry is turned off, all drive modes are set to Analog HI-Z, and interrupts are re-enabled.
implies that ,to use sleep mode and the PLL, the software must be able to execute at 3 MHz. A simple write to the OSC_CR0 register can reduce CPU speed. However, this register just sets a divider of SYSCLK, which means that the CPU speed will vary between part families with different SYSCLKs. Typically, SYSCLK is 24 MHz OSC_CR0 &= 0xf8; // CPU = 3 IMO = 24 6.2.2 Execution of Global Interrupt Enable It is undesirable to get an interrupt on the instruction boundary of writing the SLEEP bit.
7. Resources 7.1 Website Visit Cypress’s CapSense Controllers website to access all of the reference material discussed in this section. Find a variety of technical resources for the CapSense CY8C20xx6A/H family of devices at the CY8C20xx6A/H web page. 7.2 Datasheet The datasheets for the CapSense CY8C20XX6A/H family of devices are available at www.cypress.com. CY8C20x36A, CY8C20x46A, CY8C20x66A, CY8C20x96A CY8C20336H, CY8C20446A 7.
7.4.2.3 Linear Slider Module Board The CY3280-SLM Linear Slider Module consists of five CapSense buttons, one linear slider (with ten sensors), and five LEDs. This module connects to any CY3280 Universal CapSense Controller Board. 7.4.2.4 Radial Slider Module Board The CY3280-SRM Radial Slider Module consists of four CapSense buttons, one radial slider (with ten sensors), and four LEDs. This module connects to any CY3280 Universal CapSense Controller Board 7.4.2.
7.8 Code Examples Cypress offers a large collection of code examples to get your design up and running fast.