Specifications

ManualsBrandsCypress ManualsComputer HardwareCY14B101LA

STK17TA8

128k X 8 AutoStore nvSRAM with

Real Time Clock

Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600

Document #: 001-52039 Rev. *C Revised April 5, 2010

Features

■ nvSRAM Combined with Integrated Real Time Clock Functions

(RTC, Watchdog Timer, Clock Alarm, Power Monitor)

■ Capacitor or Battery Backup for RTC

■ 25 ns

[1]

, 45 ns Read Access and Read/Write Cycle Time

■ Unlimited Read/Write Endurance

■ Automatic nonvolatile STORE on Power Loss

■ Nonvolatile STORE Under Hardware or Software Control

■ Automatic RECALL to SRAM on Power Up

■ Unlimited RECALL Cycles

■ 200K STORE Cycles

■ 20-Year nonvolatile Data Retention

■ Single 3 V +20%, -10% Power Supply

■ Commercial and Industrial Temperatures

■ 48-pin 300-mil SSOP Package (RoHS-Compliant)

Description

The Cypress STK17TA8 combines a 1 Mb nonvolatile static RAM

(nvSRAM) with a full featured real time clock in a reliable,

monolithic integrated circuit.

The 1 Mb nvSRAM is a fast static RAM with a nonvolatile

Quantum Trap storage element included with each memory cell.

The SRAM provides the fast access and cycle times, ease of use

and unlimited read and write endurance of a normal SRAM. Data

transfers automatically to the nonvolatile storage cells when

power loss is detected (the STORE operation). On power up,

data is automatically restored to the SRAM (the RECALL

operation). Both STORE and RECALL operations are also

available under software control.

The real time clock function provides an accurate clock with leap

year tracking and a programmable, high accuracy oscillator. The

Alarm function is programmable for one-time alarms or periodic

minutes, hours, or days alarms. There is also a programmable

watchdog timer for processor control.

Logic Block Diagram

ROW DECODER INPUT BUFFERS

COLUMN DEC

COLUMN I/O

POWER

CONTROL

HSB

STORE/

RECALL

CONTROL

SOFTWARE

DETECT

– A

Quantum Trap

1024 X 1024

STATIC RAM

ARRAY

1024 X 1024

STORE

RECALL

CAP

RTC

MUX

– A

INT

RTCbat

RTCcap

Note

1. 25 ns speed in Industrial temperature range is over the operating voltage range of 3.3V+

0.3V only.

[+] Feedback

Not Recommended for New Designs

Summary of content (24 pages)

PAGE 1
STK17TA8 128k X 8 AutoStore nvSRAM with Real Time Clock Description ■ nvSRAM Combined with Integrated Real Time Clock Functions (RTC, Watchdog Timer, Clock Alarm, Power Monitor) ■ Capacitor or Battery Backup for RTC The Cypress STK17TA8 combines a 1 Mb nonvolatile static RAM (nvSRAM) with a full featured real time clock in a reliable, monolithic integrated circuit.
PAGE 2
STK17TA8 Contents ew D es ig ns Noise Considerations ................................................... 14 Preventing AutoStore ................................................... 14 Best Practices .............................................................. 14 Low Average Active Power ...........................................14 RTC Operations .................................................................15 Real Time Clock ...........................................................
PAGE 3
STK17TA8 Pinouts Figure 1.
PAGE 4
STK17TA8 Absolute Maximum Ratings Note Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Voltage on Input Relative to Ground ................–0.1V to 4.
PAGE 5
STK17TA8 DC Electrical Characteristics (continued) (VCC = 2.7V-3.6V) NVC DATAR Nonvolatile STORE operations Data Retention 200 20 Industrial Min Max – 40 85 2.7 3.6 17 57 Units 200 20 K Years At 55 °C °C V μF Notes 3.0V +20%, -10% Between VCAP pin and VSS, 5V rated. ig ns Operating Temperature Operating Voltage Storage Capacitance Parameter es TA VCC VCAP Commercial Min Max 0 70 2.7 3.6 17 57 Symbol AC Test Conditions D Input Pulse Levels ................................................
PAGE 6
STK17TA8 RTC DC Characteristics IBAK VRTCbat RTC Backup Current RTC Battery Pin Voltage Commercial Min Max — 300 1.8 3.3 VRTCcap RTC Capacitor Pin Voltage 1.2 2.7 1.2 2.7 V tOSCS RTC Oscillator time to start — 10 — 10 sec — 5 — 5 sec Industrial Min Max — 350 1.8 3.3 Units Notes nA V From either VRTCcap or VRTCbat Typical = 3.0 Volts during normal operation Typical = 2.
PAGE 7
STK17TA8 SRAM READ Cycles #1 and #2 #1 #2 STK17TA8-25[1] Parameter Alt.
PAGE 8
STK17TA8 SRAM WRITE Cycles #1 and #2 STK17TA8-25[1] Symbols NO. #1 Parameter #2 Alt.
PAGE 9
STK17TA8 AutoStore/Power Up Recall NO. 22 Symbols Standard STK17TA8 Parameter Alternate Min Power up RECALL Duration tHRECALL Notes 40 ms 10 11,12 23 tSTORE STORE Cycle Duration 12.5 ms 24 VSWITCH Low Voltage Trigger Level 2.65 V 25 VCCRISE VCC Rise Time ig ns tHLHZ Units Max 150 de d fo r N ew D es Figure 9.
PAGE 10
STK17TA8 Software-Controlled STORE/RECALL Cycle In the following table, the software controlled STORE and RECALL cycle parameters are listed.
PAGE 11
STK17TA8 Hardware STORE Cycle Symbols Standard 31 tDELAY 32 tHLHX tHLQZ STK17TA8 Parameter Alternate Min Max Hardware STORE to SRAM Disabled 1 70 Hardware STORE Pulse Width 15 Units Notes μs 15 ns ig ns NO. Figure 12. Hardware STORE Cycle es 32 ew D 23 fo r N 31 de NO. Symbols Parameter m en Standard 33 d Soft Sequence Commands tSS STK17TA8 Min Units Notes μs 16,17 Max Soft Sequence Processing Time 70 33 33 N ot R ec om Figure 13.
PAGE 12
STK17TA8 MODE Selection W G A16-A0 Mode I/O Power H L L L X H L H X L X L X X X 0x04E38 0x0B1C7 0x083E0 0x07C1F 0x0703F 0x08FC0 0x04E38 0x0B1C7 0x083E0 0x07C1F 0x0703F 0x04C63 Not Selected Read SRAM Write SRAM Read SRAM Read SRAM Read SRAM Read SRAM Read SRAM Nonvolatile Store Read SRAM Read SRAM Read SRAM Read SRAM Read SRAM Nonvolatile Recall Output High Z Output Data Input Data Output Data Output Data Output Data Output Data Output Data Output High Z Output Data Output Data Output Data Output
PAGE 13
STK17TA8 ig ns es Figure 14 shows the proper connection of the storage capacitor (VCAP) for automatic store operation. Refer to the DC Electrical Characteristics on page 4 for the size of the capacitor. The voltage on the VCAP pin is driven to 5V by a charge pump internal to the chip. A pull up should be placed on W to hold it inactive during power up.
PAGE 14
STK17TA8 Preventing AutoStore atile elements. Once a STORE cycle is initiated, further memory inputs and outputs are disabled until the cycle is completed. Because of the use of nvSRAM to store critical RTC data, the AutoStore function cannot be disabled on the STK17TA8. To initiate the Software STORE cycle, the following read sequence must be performed: 1. Read Address 0x4E38 Valid READ 2. Read Address 0xB1C7 Valid READ 3. Read Address 0x83E0 Valid READ 4. Read Address 0x7C1F Valid READ 5.
PAGE 15
STK17TA8 Figure 15. Current versus Cycle Time You can power the real time clock with either a capacitor or a battery. Factors to be considered when choosing a backup power source include the expected duration of power outages and the cost and reliability trade-off of using a battery versus a capacitor. Capacitor Value 0.47 F 14 days 30 days D 1.0 F Backup Time 72 hours es 0.
PAGE 16
STK17TA8 Calibrating The Clock The alarm value should be initialized on power up by software since the alarm registers are not nonvolatile. The RTC is driven by a quartz controlled oscillator with a nominal frequency of 32.768 KHz. Clock accuracy will depend on the quality of the crystal, specified (usually 35 ppm at 25 C). This error could equate to 1.53 minutes gain or loss per month. The STK17TA8 employs a calibration circuit that can improve the accuracy to +1/-2 ppm at 25 C.
PAGE 17
STK17TA8 Interrupts Power Fail Interrupt Enable (PFE). When set to 1, the INT pin is driven by a power fail signal from the power monitor circuit. When set to 0, only the PF flag is set. The STK17TA8 has a Flags register, Interrupt Register, and interrupt logic that can interrupt a microcontroller or generate a power up master reset signal. There are three potential interrupt sources: the watchdog timer, the power monitor, and the clock alarm.
PAGE 18
STK17TA8 RTC Register BCD Format Data 0x1FFFF D5 D4 D3 D2 10s Years 0x1FFFE 0 0 0 0x1FFFD 0 0 10s Day of Month 0 0x1FFFC 0 0 0x1FFFB 0 0 10s Months 0 0 D1 Years Years: 00-99 Months Months: 01-12 Day of Month Day of Month: 01-31 Day of Week 10s Hours 0x1FFFA 0 10s Minutes Minutes 0x1FFF9 0 10s Seconds Seconds 0x1FFF8 OSCEN [0] 0 0x1FFF7 WDS WDW 0x1FFF6 WIE [0] AIE [0] Hours: 00-23 Minutes: 00-59 Seconds: 00-59 WDT H/L [1] P/L [0] 0 Watchdog* 0 N 0 C
PAGE 19
STK17TA8 Register Map Detail 0x1FFFF D6 Real Time Clock – Years D4 D3 D5 D2 D1 D0 10s Years Years Contains the lower two BCD digits of the year. Lower nibble contains the value for years; upper nibble contains the value for 10s of years. Each nibble operates from 0 to 9. The range for the register is 0-99. Real Time Clock – Months D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 10s Month Months Contains the BCD digits of the month.
PAGE 20
STK17TA8 Register Map Detail (continued) 0x1FFF7 WDS ew 0x1FFF6 D WDT es ig ns WDW Watchdog Timer D7 D6 D5 D4 D3 D2 D1 D0 WDS WDW WDT Watchdog Strobe. Setting this bit to 1 reloads and restarts the watchdog timer. The bit is cleared automatically once the watchdog timer is reset. The WDS bit is write only. Reading it always will return a 0. Watchdog Write Enable. Set this bit to 1 to disable writing of the watchdog time-out value (WDT5-WDT0).
PAGE 21
STK17TA8 Register Map Detail (continued) WDF PF N ot R ec om R de W m en CAL d OSCF fo r N AF ew 0x1FFF0 ig ns 0x1FFF1 es M Alarm – Seconds D7 D6 D5 D4 D3 D2 D1 D0 M 10s Alarm Seconds Alarm Seconds Contains the alarm value for the seconds and the mask bit to select or deselect the seconds’ value. Match. Setting this bit to 0 causes the seconds’ value to be used in the alarm match. Setting this bit to 1 causes the match circuit to ignore the seconds value.
PAGE 22
STK17TA8 Ordering Information STK17TA8-R F 45 ITR Packing Option ig ns Blank=Tube TR=Tape and Reel Temperature Range es Blank=Commercial (0 to +70 C) I= Industrial (-45 to +85 C) Access Time D 25=25 ns 45=45 ns ew Lead Finish F=100% Sn (Matte Tin) RoHS Compliant N Package fo r R=Plastic 48-pin 300 mil SSOP (25 mil pitch) de These parts are not recommended for new designs.
PAGE 23
STK17TA8 Package Diagrams 51-85061 *D N ot R ec om m en de d fo r N ew D es ig ns Figure 17. 48-Pin SSOP (51-85061) Document #: 001-52039 Rev.
PAGE 24
STK17TA8 Document History Page es ig ns Document Title: STK17TA8 128k X 8 AutoStore nvSRAM with Real Time Clock Document Number: 001-52039 Orig. of Submission Rev. ECN No. Description of Change Change Date ** 2668660 GVCH/PYRS 03/04/2009 New Data Sheet *A 2814390 GVCH 11/25/2009 Added note in the Ordering Information section mentioning that these parts are not recommended for new designs. Added “Not recommended for new designs” watermark in the PDF.