Specifications
STK17TA8
Document #: 001-52039 Rev. *C Page 3 of 24
Pinouts
Figure 1. Pin Diagram - 48-PIn SSOP
V
SS
A
14
A
12
A
7
A
6
DQ
0
DQ
1
V
CC
DQ
2
A
3
A
2
A
1
V
CAP
A
13
A
8
A
9
A
11
A
10
DQ
7
DQ
6
V
SS
A
0
NC
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NC
X
1
X
2
23
24
A
5
INT
NC
NC
NC
NC
A
4
48
47
46
45
V
CC
HSB
NC
NC
W
NC
DQ
5
DQ
3
DQ
4
V
RTCbat
V
RTCcap
A
16
A
15
E
G
(TOP)
Relative PCB Area Usage
[2]
Note
2. For detailed package size specifications, See “Package Diagrams” on page 23..
Pin Descriptions
Pin Name I/O Type Description
A
16
-A
0
Input Address: The 17 address inputs select one of 131,072 bytes in the nvSRAM array or one of 16 bytes
in the clock register map
DQ
7
-DQ
0
I/O Data: Bi-directional 8-bit data bus for accessing the nvSRAM and RTC
E Input Chip Enable: The active low E
input selects the device
W Input Write Enable: The active low W
enables data on the DQ pins to be written to the address location
selected on the falling edge of E
G Input Output Enable: The active low G input enables the data output buffers during read cycles.
De-asserting G
high caused the DQ pins to tristate.
X
1
Output Crystal Connection, drives crystal on startup
X
2
Input Crystal Connection for 32.768 kHz crystal
V
RTCcap
Power Supply Capacitor supplied backup RTC supply voltage (Left unconnected if V
RTCbat
is used)
V
RTCbat
Power Supply Battery supplied backup RTC supply voltage (Left unconnected if V
RTCcap
is used)
V
CC
Power Supply Power: 3.0V, +20%, -10%
HSB I/O Hardware Store Busy
: When low this output indicates a Store is in progress. When pulled low external
to the chip, it initiates a nonvolatile STORE operation. A weak pull up resistor keeps this pin high if not
connected. (Connection Optional).
INT Output Interrupt Control: Can be programmed to respond to the clock alarm, the watchdog timer and the
power monitor. Programmable to either active high (push/pull) or active low (open-drain)
V
CAP
Power Supply Autostore Capacitor: Supplies power to nvSRAM during power loss to store data from SRAM to
nonvolatile storage elements.
V
SS
Power Supply Ground
NC No Connect Unlabeled pins have no internal connections.
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