Specifications

CY14B104K, CY14B104M
Document #: 001-07103 Rev. *O Page 22 of 33
AutoStore/Power Up RECALL
Parameters Description
CY14B104K/CY14B104M
Unit
Min Max
t
HRECALL
[23]
Power Up RECALL Duration 20 ms
t
STORE
[24]
STORE Cycle Duration 8 ms
t
DELAY
[25]
Time Allowed to Complete SRAM Write Cycle 25 ns
V
SWITCH
Low Voltage Trigger Level 2.65 V
t
VCCRISE
[13]
V
CC
Rise Time 150 μs
V
HDIS
[13]
HSB Output Disable Voltage 1.9 V
t
LZHSB
[13]
HSB To Output Active Time 5 μs
t
HHHD
[13]
HSB High Active Time 500 ns
Switching Waveforms
Figure 12. AutoStore or Power Up RECALL
[26]
V
SWITCH
V
HDIS
V
VCCRISE
t
STORE
t
STORE
t
HHHD
t
HHHD
t
DELAY
t
DELAY
t
LZHSB
t
LZHSB
t
HRECALL
t
HRECALL
HSB OUT
AutoStore
POWER-
UP
RECALL
Read & Write
Inhibited
(
RWI)
POWER-UP
RECALL
Read & Write
BROWN
OUT
AutoStore
POWER-UP
RECALL
Read & Write
POWER
DOWN
AutoStore
Note
Note
Note
V
CC
24
24
27
Notes
23. t
HRECALL
starts from the time V
CC
rises above V
SWITCH.
24. If an SRAM write has not taken place since the last nonvolatile cycle, no AutoStore or Hardware STORE takes place.
25. On a Hardware Store and AutoStore initiation, SRAM write operation continues to be enabled for time t
DELAY
.
26. Read and write cycles are ignored during STORE, RECALL, and while V
CC
is below V
SWITCH.
27. HSB pin is driven HIGH to V
CC
only by internal 100 k Ω resistor, HSB driver is disabled.
[+] Feedback