Specifications

CY14B108K
CY14B108M
Document Number: 001-47378 Rev. *K Page 25 of 36
AutoStore/Power-Up RECALL
Over the Operating Range
Parameter Description
CY14B108K/CY14B108M
Unit
Min Max
t
HRECALL
[43]
Power-Up RECALL duration – 20 ms
t
STORE
[44]
STORE cycle duration – 8 ms
t
DELAY
[45]
Time allowed to complete SRAM write cycle – 25 ns
V
SWITCH
Low voltage trigger level – 2.65 V
t
VCCRISE
[46]
V
CC
rise time 150 – s
V
HDIS
[46]
HSB output disable voltage – 1.9 V
t
LZHSB
[46]
HSB to output active time – 5 s
t
HHHD
[46]
HSB high active time – 500 ns
Switching Waveforms
Figure 13. AutoStore or Power-Up RECALL
[47]
V
SWITCH
V
HDIS
t
VCCRISE
t
STORE
t
STORE
t
HHHD
t
HHHD
t
DELAY
t
DELAY
t
LZHSB
t
LZHSB
t
HRECALL
t
HRECALL
HSB OUT
AutoStore
POWER-
UP
RECALL
Read & Write
Inhibited
(RWI)
POWER-UP
RECALL
Read & Write
BROWN
OUT
AutoStore
POWER-UP
RECALL
Read & Write
POWER
DOWN
AutoStore
Note
Note
Note
Note
V
CC
44
44
48
48
Notes
43. t
HRECALL
starts from the time V
CC
rises above V
SWITCH
.
44. If an SRAM write has not taken place since the last nonvolatile cycle, no AutoStore or Hardware STORE takes place.
45. On a Hardware STORE and AutoStore initiation, SRAM write operation continues to be enabled for time t
DELAY
.
46. These parameters are only guaranteed by design and are not tested.
47. Read and Write cycles are ignored during STORE, RECALL, and while V
CC
is below V
SWITCH
.
48. During power-up and power-down, HSB
glitches when HSB pin is pulled up through an external resistor.