Specifications
CY14B108K
CY14B108M
Document Number: 001-47378 Rev. *K Page 26 of 36
Software Controlled STORE and RECALL Cycle
Over the Operating Range
Parameter
[49, 50]
Description
25 ns 45 ns
Unit
Min Max Min Max
t
RC
STORE/RECALL initiation cycle time 25 – 45 – ns
t
SA
Address setup time 0 – 0 – ns
t
CW
Clock pulse width 20 – 30 – ns
t
HA
Address hold time 0 – 0 – ns
t
RECALL
RECALL duration – 200 – 200 s
t
SS
[51, 52]
Soft sequence processing time – 100 – 100 s
Switching Waveforms
Figure 14. CE and OE Controlled Software STORE and RECALL Cycle
[50]
Figure 15. AutoStore Enable and Disable Cycle
[50]
t
RC
t
RC
t
SA
t
CW
t
CW
t
SA
t
HA
t
LZCE
t
HZCE
t
HA
t
HA
t
HA
t
STORE
/t
RECALL
t
HHHD
t
LZHSB
High Impedance
Address #1 Address #6Address
CE
OE
HSB (STORE only)
DQ (DATA)
RWI
t
DELAY
Note
53
t
RC
t
RC
t
SA
t
CW
t
CW
t
SA
t
HA
t
LZCE
t
HZCE
t
HA
t
HA
t
HA
t
DELAY
Address #1 Address #6Address
CE
OE
DQ (DATA)
t
SS
Note
RWI
53
Notes
49. The software sequence is clocked with CE
controlled or OE controlled reads.
50. The six consecutive addresses must be read in the order listed in Tabl e 1. WE
must be HIGH during all six consecutive cycles.
51. This is the amount of time it takes to take action on a soft sequence command. Vcc power must remain HIGH to effectively register command.
52. Commands such as STORE and RECALL lock out I/O until operation is complete which further increases this time. See the specific command.
53. DQ output data at the sixth read may be invalid since the output is disabled at t
DELAY
time.